[PowerPC] Fix issue with inline asm - soft float mode

This patch prevents floating point register
constraints in soft float mode.

Differential Revision: https://reviews.llvm.org/D59310

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@357466 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Basic/Targets/PPC.cpp b/lib/Basic/Targets/PPC.cpp
index 14a9ffd09a6aecafbd9c1cbb00039a3209ba4abd..b052ef433ecb0eed57886e15321f3c09841cd7f1 100644 (file)
--- a/lib/Basic/Targets/PPC.cpp
+++ b/lib/Basic/Targets/PPC.cpp
@@ -30,6 +30,7 @@ const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
 /// configured set of features.
 bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
                                          DiagnosticsEngine &Diags) {
+  FloatABI = HardFloat;
   for (const auto &Feature : Features) {
     if (Feature == "+altivec") {
       HasAltivec = true;
@@ -53,6 +54,8 @@ bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       HasFloat128 = true;
     } else if (Feature == "+power9-vector") {
       HasP9Vector = true;
+    } else if (Feature == "-hard-float") {
+      FloatABI = SoftFloat;
     }
     // TODO: Finish this list and add an assert that we've handled them
     // all.

diff --git a/lib/Basic/Targets/PPC.h b/lib/Basic/Targets/PPC.h
index ace7eb35e768e2ca78d483e746d104e2f9fc9064..7049020a91139ad9fbca9886a9ff2331916ea406 100644 (file)
--- a/lib/Basic/Targets/PPC.h
+++ b/lib/Basic/Targets/PPC.h
@@ -53,6 +53,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
   static const char *const GCCRegNames[];
   static const TargetInfo::GCCRegAlias GCCRegAliases[];
   std::string CPU;
+  enum PPCFloatABI { HardFloat, SoftFloat } FloatABI;
 
   // Target cpu features.
   bool HasAltivec = false;
@@ -183,8 +184,11 @@ public:
       return false;
     case 'O': // Zero
       break;
-    case 'b': // Base register
     case 'f': // Floating point register
+      // Don't use floating point registers on soft float ABI.
+      if (FloatABI == SoftFloat)
+        return false;
+    case 'b': // Base register
       Info.setAllowsRegister();
       break;
     // FIXME: The following are added to allow parsing.
@@ -192,6 +196,10 @@ public:
     // Also, is more specific checking needed?  I.e. specific registers?
     case 'd': // Floating point register (containing 64-bit value)
     case 'v': // Altivec vector register
+      // Don't use floating point and altivec vector registers
+      // on soft float ABI
+      if (FloatABI == SoftFloat)
+        return false;
       Info.setAllowsRegister();
       break;
     case 'w':

diff --git a/test/Driver/ppc-inlineasm-sf.c b/test/Driver/ppc-inlineasm-sf.c
new file mode 100644 (file)
index 0000000..85ce40f
--- /dev/null
+++ b/test/Driver/ppc-inlineasm-sf.c
@@ -0,0 +1,16 @@
+// RUN: not %clang -target powerpc-unknown-linux -O2 -fPIC -m32 -msoft-float %s -o %t.o 2>&1 | FileCheck --check-prefix=CHECK-ERRMSG %s
+int foo ()
+{
+  double x,y;
+  int a;
+  __asm__ ("fctiw %0,%1" : "=f"(x) : "f"(y));
+  // CHECK-ERRMSG:      error: invalid output constraint '=f' in asm
+  // CHECK-ERRMSG-NEXT:  __asm__ ("fctiw %0,%1" : "=f"(x) : "f"(y));
+  __asm__ ("fctiw %0,%1" : "=d"(x) : "d"(y));
+  // CHECK-ERRMSG: error: invalid output constraint '=d' in asm
+  // CHECK-ERRMSG-NEXT: __asm__ ("fctiw %0,%1" : "=d"(x) : "d"(y));
+  __asm__ ("vec_dss %0" : "=v"(a));
+  // CHECK-ERRMSG: error: invalid output constraint '=v' in asm
+  // CHECK-ERRMSG-NEXT: __asm__ ("vec_dss %0" : "=v"(a));
+}
+