]> granicus.if.org Git - clang/commitdiff
[Clang][AVX512][BuiltIn]Adding missing intrinsics move_{sd|ss} to clang
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Wed, 5 Oct 2016 12:56:06 +0000 (12:56 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Wed, 5 Oct 2016 12:56:06 +0000 (12:56 +0000)
Differential Revision: http://reviews.llvm.org/D21021

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@283314 91177308-0d34-0410-b5e6-96231b3b80d8

include/clang/Basic/BuiltinsX86.def
lib/Headers/avx512fintrin.h
test/CodeGen/avx512f-builtins.c

index ab83d0ef241864d56f3910274a692c5ae485245b..666f40e6243f21eb185f1f87282a0b18b96d39af 100644 (file)
@@ -2021,6 +2021,8 @@ TARGET_BUILTIN(__builtin_ia32_expandloadsi512_mask, "V16iV16iC*V16iUs","","avx51
 TARGET_BUILTIN(__builtin_ia32_expandsf512_mask, "V16fV16fV16fUs","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_expandsi512_mask, "V16iV16iV16iUs","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_cvtps2pd512_mask, "V8dV8fV8dUcIi","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_movss_mask, "V4fV4fV4fV4fUc","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_movsd_mask, "V2dV2dV2dV2dUc","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_compressstoredf512_mask, "vV8d*V8dUc","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_compressstoredi512_mask, "vV8LLi*V8LLiUc","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_compressstoresf512_mask, "vV16f*V16fUs","","avx512f")
index ee26b8edb5d22329d1fb9755380f218c213b875d..b56ca9c493df0c15fb74daf7ac035ab8fac4afdf 100644 (file)
@@ -9140,6 +9140,40 @@ _mm512_maskz_moveldup_ps (__mmask16 __U, __m512 __A)
                                              (__v16sf)_mm512_setzero_ps());
 }
 
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_move_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
+{
+  return (__m128) __builtin_ia32_movss_mask ((__v4sf) __A, (__v4sf) __B,
+               (__v4sf) __W,
+               (__mmask8) __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_move_ss (__mmask8 __U, __m128 __A, __m128 __B)
+{
+  return (__m128) __builtin_ia32_movss_mask ((__v4sf) __A, (__v4sf) __B,
+               (__v4sf)
+               _mm_setzero_si128(),
+               (__mmask8) __U);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_move_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
+{
+  return (__m128d) __builtin_ia32_movsd_mask ((__v2df) __A, (__v2df) __B,
+               (__v2df) __W,
+               (__mmask8) __U);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B)
+{
+  return (__m128d) __builtin_ia32_movsd_mask ((__v2df) __A, (__v2df) __B,
+               (__v2df)
+               _mm_setzero_pd (),
+               (__mmask8) __U);
+}
+
 #define _mm512_shuffle_epi32(A, I) __extension__ ({ \
   (__m512i)__builtin_shufflevector((__v16si)(__m512i)(A), \
                                    (__v16si)_mm512_undefined_epi32(), \
index 5184e7c48d734702e66a1c86bbd15c065dc35acb..d446f7982b5a484a5c013de5f873fd6f002109a5 100644 (file)
@@ -7863,6 +7863,34 @@ __m512d test_mm512_setzero_pd()
   return _mm512_setzero_pd();
 }
 
+__m128 test_mm_mask_move_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
+{
+  // CHECK-LABEL: @test_mm_mask_move_ss
+  // CHECK: @llvm.x86.avx512.mask.move.ss
+  return _mm_mask_move_ss ( __W,  __U,  __A,  __B);
+}
+
+__m128 test_mm_maskz_move_ss (__mmask8 __U, __m128 __A, __m128 __B)
+{
+  // CHECK-LABEL: @test_mm_maskz_move_ss
+  // CHECK: @llvm.x86.avx512.mask.move.ss
+  return _mm_maskz_move_ss (__U, __A, __B);
+}
+
+__m128d test_mm_mask_move_sd (__m128 __W, __mmask8 __U, __m128d __A, __m128d __B)
+{
+  // CHECK-LABEL: @test_mm_mask_move_sd
+  // CHECK: @llvm.x86.avx512.mask.move.sd
+  return _mm_mask_move_sd ( __W,  __U,  __A,  __B);
+}
+
+__m128d test_mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B)
+{
+  // CHECK-LABEL: @test_mm_maskz_move_sd
+  // CHECK: @llvm.x86.avx512.mask.move.sd
+  return _mm_maskz_move_sd (__U, __A, __B);
+}
+
 __m512d test_mm512_abs_pd(__m512d a){
   // CHECK-LABEL: @test_mm512_abs_pd
   // CHECK: and <8 x i64>