]> granicus.if.org Git - llvm/commitdiff
Use APInt::getHighBitsSet instead of APInt::getBitsSet for upper bit mask creation
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 3 Mar 2017 14:37:57 +0000 (14:37 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 3 Mar 2017 14:37:57 +0000 (14:37 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296874 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

index 65d5ad3f2423b8f90f3388b687717cca3218cd0c..4770327a69dbe4b0c686ebce4ca7815928a2af7f 100644 (file)
@@ -7498,7 +7498,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
     // a constant pool load than it is to do a movd + shuffle.
     if (ExtVT == MVT::i64 && !Subtarget.is64Bit() &&
         (!IsAllConstants || Idx == 0)) {
-      if (DAG.MaskedValueIsZero(Item, APInt::getBitsSet(64, 32, 64))) {
+      if (DAG.MaskedValueIsZero(Item, APInt::getHighBitsSet(64, 32))) {
         // Handle SSE only.
         assert(VT == MVT::v2i64 && "Expected an SSE value type!");
         MVT VecVT = MVT::v4i32;