Summary:
This fixes code-gen for XRay in PPC. The regression wasn't caught by
codegen tests which we add in this change.
What happened was the following:
- For tail exits, we used to unconditionally prepend the returns/exits
with a pseudo-instruction that gets lowered to the instrumentation
sled (and leave the actual return/exit instruction as-is).
- Changes to the XRay instrumentation pass caused the tail exits to
suddenly also emit the tail exit pseudo-instruction, since the check
for whether a return instruction was also a call instruction meant it
was a tail exit instruction.
- None of the tests caught the regression either due to non-existent
tests, or the tests being disabled/removed for continuous breakage.
This change re-introduces some of the basic tests and verifies that
we're back to a state that allows the back-end to generate appropriate
XRay instrumented binaries for PPC in the presence of tail exits.
Reviewers: echristo, timshen
Subscribers: nemanjai, kbarton, llvm-commits
Differential Revision: https://reviews.llvm.org/D37570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312772
91177308-0d34-0410-b5e6-
96231b3b80d8
//
//===---------------------------------------------------------------------===//
-#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Triple.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
void XRayInstrumentation::prependRetWithPatchableExit(
MachineFunction &MF, const TargetInstrInfo *TII) {
- for (auto &MBB : MF) {
- for (auto &T : MBB.terminators()) {
- unsigned Opc = 0;
+ for (auto &MBB : MF)
+ for (auto &T : MBB.terminators())
if (T.isReturn()) {
- Opc = TargetOpcode::PATCHABLE_FUNCTION_EXIT;
- }
- if (TII->isTailCall(T)) {
- Opc = TargetOpcode::PATCHABLE_TAIL_CALL;
- }
- if (Opc != 0) {
- // Prepend the return instruction with PATCHABLE_FUNCTION_EXIT or
- // PATCHABLE_TAIL_CALL .
- BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc));
+ // Prepend the return instruction with PATCHABLE_FUNCTION_EXIT.
+ BuildMI(MBB, T, T.getDebugLoc(),
+ TII->get(TargetOpcode::PATCHABLE_FUNCTION_EXIT));
}
- }
- }
}
bool XRayInstrumentation::runOnMachineFunction(MachineFunction &MF) {
// Count the number of MachineInstr`s in MachineFunction
int64_t MICount = 0;
- for (const auto& MBB : MF)
+ for (const auto &MBB : MF)
MICount += MBB.size();
// Check if we have a loop.
break;
}
case TargetOpcode::PATCHABLE_TAIL_CALL:
+ // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
+ // normal function exit from a tail exit.
case TargetOpcode::PATCHABLE_RET:
// PPC's tail call instruction, e.g. PPC::TCRETURNdi8, doesn't really
// lower to a PPC::B instruction. The PPC::B instruction is generated
--- /dev/null
+; RUN: llc -filetype=asm -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -filetype=asm -o - -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -relocation-model=pic < %s | FileCheck %s
+
+define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" {
+; CHECK-LABEL: .Ltmp0:
+; CHECK: b .Ltmp1
+; CHECK-NEXT: nop
+; CHECK-NEXT: std 0, -8(1)
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: bl __xray_FunctionEntry
+; CHECK-NEXT: nop
+; CHECK-NEXT: mtlr 0
+; CHECK-LABEL: .Ltmp1:
+ ret i32 0
+; CHECK-LABEL: .Ltmp2:
+; CHECK: blr
+; CHECK-NEXT: nop
+; CHECK-NEXT: std 0, -8(1)
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: bl __xray_FunctionExit
+; CHECK-NEXT: nop
+; CHECK-NEXT: mtlr 0
+}
+; CHECK-LABEL: xray_instr_map,"awo",@progbits,.text,unique,1
+; CHECK: .Lxray_sleds_start0:
+; CHECK-NEXT: .quad .Ltmp0
+; CHECK-NEXT: .quad foo
+; CHECK-NEXT: .byte 0x00
+; CHECK-NEXT: .byte 0x01
+; CHECK-NEXT: .byte 0x00
+; CHECK-NEXT: .space 13
+; CHECK-NEXT: .quad .Ltmp2
+; CHECK-NEXT: .quad foo
+; CHECK-NEXT: .byte 0x01
+; CHECK-NEXT: .byte 0x01
+; CHECK-NEXT: .byte 0x00
+; CHECK-NEXT: .space 13
+; CHECK-NEXT: .Lxray_sleds_end0:
+; CHECK-LABEL: xray_fn_idx,"awo",@progbits,.text,unique,1
+; CHECK: .p2align 4
+; CHECK-NEXT: .quad .Lxray_sleds_start0
+; CHECK-NEXT: .quad .Lxray_sleds_end0
+; CHECK-NEXT: .text
--- /dev/null
+; RUN: llc -filetype=asm -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+
+declare hidden i32 @callee() nounwind noinline uwtable "function-instrument"="xray-always"
+
+define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-always" {
+; CHECK-LABEL: .Ltmp0:
+; CHECK: b .Ltmp1
+; CHECK-NEXT: nop
+; CHECK-NEXT: std 0, -8(1)
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: bl __xray_FunctionEntry
+; CHECK-NEXT: nop
+; CHECK-NEXT: mtlr 0
+; CHECK-LABEL: .Ltmp1:
+ %retval = tail call i32 @callee()
+ ret i32 %retval
+; CHECK-LABEL: .Ltmp2:
+; CHECK: b callee
+; CHECK-NEXT: nop
+; CHECK-NEXT: std 0, -8(1)
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: bl __xray_FunctionExit
+; CHECK-NEXT: nop
+; CHECK-NEXT: mtlr 0
+}
+
--- /dev/null
+; RUN: llc -filetype=asm -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+
+define i32 @callee() nounwind noinline uwtable "function-instrument"="xray-always" {
+; CHECK-LABEL: .Ltmp0:
+; CHECK: b .Ltmp1
+; CHECK-NEXT: nop
+; CHECK-NEXT: std 0, -8(1)
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: bl __xray_FunctionEntry
+; CHECK-NEXT: nop
+; CHECK-NEXT: mtlr 0
+; CHECK-LABEL: .Ltmp1:
+ ret i32 0
+; CHECK-LABEL: .Ltmp2:
+; CHECK: blr
+; CHECK-NEXT: nop
+; CHECK-NEXT: std 0, -8(1)
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: bl __xray_FunctionExit
+; CHECK-NEXT: nop
+; CHECK-NEXT: mtlr 0
+}
+
+define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-always" {
+; CHECK-LABEL: .Ltmp3:
+; CHECK: b .Ltmp4
+; CHECK-NEXT: nop
+; CHECK-NEXT: std 0, -8(1)
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: bl __xray_FunctionEntry
+; CHECK-NEXT: nop
+; CHECK-NEXT: mtlr 0
+; CHECK-LABEL: .Ltmp4:
+ %retval = tail call i32 @callee()
+ ret i32 %retval
+; CHECK-LABEL: .Ltmp5:
+; CHECK: blr
+; CHECK-NEXT: nop
+; CHECK-NEXT: std 0, -8(1)
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: bl __xray_FunctionExit
+; CHECK-NEXT: nop
+; CHECK-NEXT: mtlr 0
+}
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