There are about 3 underlying bugs causing the tests to fail.
On top of that, some tests just we're 'generic' enough. i.e. 32-bit
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294434
91177308-0d34-0410-b5e6-
96231b3b80d8
; RUN: llc < %s
+; Bug: PR31341
+; XFAIL: avr
+
;; Date: Jul 29, 2003.
;; From: test/Programs/MultiSource/Ptrdist-bc
;; Function: ---
; PR1308
; PR1557
+; Bug: PR31336
+; XFAIL: avr
+
define i32 @stuff(i32, ...) {
%foo = alloca i8*
%bar = alloca i32*
; RUN: llc -no-integrated-as < %s
+; XFAIL: avr
+
define fastcc void @bc__support__high_resolution_time__initialize_clock_rate() personality i32 (...)* @__gxx_personality_v0 {
entry:
invoke void asm "rdtsc\0A\09movl %eax, $0\0A\09movl %edx, $1", "=*imr,=*imr,~{dirflag},~{fpsr},~{flags},~{dx},~{ax}"( i32* null, i32* null )
; RUN: llc < %s
+
+; Bug: PR31898
+; XFAIL: avr
+
; This caused ScheduleDAG to crash in EmitPhysRegCopy when searching
; the uses of a copy to a physical register without ignoring non-data
; dependence, PR10220.
; to fail.
; XFAIL: hexagon
+; Bug: PR31899
+; XFAIL: avr
+
; Make sure we have the correct weight attached to each successor.
define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
; CHECK-LABEL: Machine code for function test2:
; RUN: llc -O2 -no-integrated-as < %s | FileCheck %s
+; Test uses 32-bit registers which aren't supported on AVR.
+; XFAIL: avr
+
@G = common global i32 0, align 4
define i32 @foo(i8* %p) nounwind uwtable {
; RUN: llc < %s
+
; PR2504
; XFAIL: hexagon
+
+; PR31338
+; XFAIL: avr
+
define <2 x double> @vector_select(<2 x double> %x, <2 x double> %y) nounwind {
%x.lo = extractelement <2 x double> %x, i32 0 ; <double> [#uses=1]
%x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]
; RUN: llc < %s
+
+; Bug: PR31898
+; XFAIL: avr
+
%f8 = type <8 x float>
define void @test_f8(%f8 *%P, %f8* %Q, %f8 *%S) {
; RUN: llc < %s -debug-only=isel -o /dev/null 2>&1 | FileCheck %s
; REQUIRES: asserts
+; Bug: PR31898
+; XFAIL: avr
+
@a = global [1024 x i32] zeroinitializer, align 16
define i32 @reduce_add() {
; Test that vectors are scalarized/lowered correctly.
; RUN: llc < %s
+; Bug: PR31898
+; XFAIL: avr
+
%d8 = type <8 x double>
%f1 = type <1 x float>
%f2 = type <2 x float>