/// - guard variables are smaller.
GenericAArch64,
+ /// The generic Mips ABI is a modified version of the Itanium ABI.
+ ///
+ /// At the moment, only change from the generic ABI in this case is:
+ /// - representation of member function pointers adjusted as in ARM.
+ GenericMIPS,
+
/// The Microsoft ABI is the ABI used by Microsoft Visual Studio (and
/// compatible compilers).
///
case GenericARM:
case iOS:
case iOS64:
+ case GenericMIPS:
return true;
case Microsoft:
case GenericARM:
case iOS:
case iOS64:
+ case GenericMIPS:
return false;
case Microsoft:
case GenericItanium:
case iOS: // old iOS compilers did not follow this rule
case Microsoft:
+ case GenericMIPS:
return true;
}
llvm_unreachable("bad ABI kind");
case GenericAArch64:
case GenericARM:
case iOS:
+ case GenericMIPS:
return UseTailPaddingUnlessPOD03;
// iOS on ARM64 uses the C++11 POD rules. It does not honor the
case TargetCXXABI::iOS:
case TargetCXXABI::iOS64:
case TargetCXXABI::GenericAArch64:
+ case TargetCXXABI::GenericMIPS:
case TargetCXXABI::GenericItanium:
return CreateItaniumCXXABI(*this);
case TargetCXXABI::Microsoft:
case TargetCXXABI::GenericAArch64:
case TargetCXXABI::GenericItanium:
case TargetCXXABI::GenericARM:
+ case TargetCXXABI::GenericMIPS:
case TargetCXXABI::iOS:
case TargetCXXABI::iOS64:
return ItaniumMangleContext::create(*this, getDiagnostics());
.Case("ios", iOS)
.Case("itanium", GenericItanium)
.Case("microsoft", Microsoft)
+ .Case("arm", GenericMIPS)
.Default(unknown);
if (kind == unknown) return false;
const std::string &CPUStr)
: TargetInfo(Triple), CPU(CPUStr), IsMips16(false), IsMicromips(false),
IsNan2008(false), IsSingleFloat(false), FloatABI(HardFloat),
- DspRev(NoDSP), HasMSA(false), HasFP64(false), ABI(ABIStr) {}
+ DspRev(NoDSP), HasMSA(false), HasFP64(false), ABI(ABIStr) {
+ TheCXXABI.set(TargetCXXABI::GenericMIPS);
+ }
bool isNaN2008Default() const {
return CPU == "mips32r6" || CPU == "mips64r6";
case TargetCXXABI::GenericARM:
case TargetCXXABI::iOS:
case TargetCXXABI::iOS64:
+ case TargetCXXABI::GenericMIPS:
case TargetCXXABI::GenericItanium:
return CreateItaniumCXXABI(CGM);
case TargetCXXABI::Microsoft:
return new ItaniumCXXABI(CGM, /* UseARMMethodPtrABI = */ true,
/* UseARMGuardVarABI = */ true);
+ case TargetCXXABI::GenericMIPS:
+ return new ItaniumCXXABI(CGM, /* UseARMMethodPtrABI = */ true);
+
case TargetCXXABI::GenericItanium:
if (CGM.getContext().getTargetInfo().getTriple().getArch()
== llvm::Triple::le32) {
// PNaCl uses the same representation of method pointers as ARM.
// RUN: %clang_cc1 %s -emit-llvm -o - -triple=le32-unknown-nacl | FileCheck -check-prefix GLOBAL-ARM %s
+// MIPS uses the same representation of method pointers as ARM.
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=mips-unknown-linux-gnu | FileCheck -check-prefix GLOBAL-ARM %s
struct A { int a; void f(); virtual void vf1(); virtual void vf2(); };
struct B { int b; virtual void g(); };