[AArch64][SVE2] Asm: support WHILE instructions

Summary:
Patch adds support for the following instructions:
    * WHILEGE, WHILEGT, WHILEHS, WHILEHI, WHILEWR, WHILERW

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D62601

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362215 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64SVEInstrInfo.td b/lib/Target/AArch64/AArch64SVEInstrInfo.td
index 6a6fedd03038c6bf7896fb3cd4743e43772628b8..79ab42f4c0807e15e6c897055bacd23d81b51a22 100644 (file)
--- a/lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ b/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -1371,6 +1371,21 @@ let Predicates = [HasSVE2] in {
   // SVE table lookup (three sources)
   defm TBL_ZZZZ : sve2_int_perm_tbl<"tbl">;
   defm TBX_ZZZ  : sve2_int_perm_tbx<"tbx">;
+
+  // SVE integer compare scalar count and limit
+  defm WHILEGE_PWW : sve_int_while4_rr<0b000, "whilege">;
+  defm WHILEGT_PWW : sve_int_while4_rr<0b001, "whilegt">;
+  defm WHILEHS_PWW : sve_int_while4_rr<0b100, "whilehs">;
+  defm WHILEHI_PWW : sve_int_while4_rr<0b101, "whilehi">;
+
+  defm WHILEGE_PXX : sve_int_while8_rr<0b000, "whilege">;
+  defm WHILEGT_PXX : sve_int_while8_rr<0b001, "whilegt">;
+  defm WHILEHS_PXX : sve_int_while8_rr<0b100, "whilehs">;
+  defm WHILEHI_PXX : sve_int_while8_rr<0b101, "whilehi">;
+
+  // SVE pointer conflict compare
+  defm WHILEWR_PXX : sve2_int_while_rr<0b0, "whilewr">;
+  defm WHILERW_PXX : sve2_int_while_rr<0b1, "whilerw">;
 }
 
 let Predicates = [HasSVE2AES] in {

diff --git a/lib/Target/AArch64/SVEInstrFormats.td b/lib/Target/AArch64/SVEInstrFormats.td
index c06b23eca1bc10aa53b6a9c5986ff28491aef43b..808e594670813385ce0fe229ed9116750de57b99 100644 (file)
--- a/lib/Target/AArch64/SVEInstrFormats.td
+++ b/lib/Target/AArch64/SVEInstrFormats.td
@@ -3270,6 +3270,32 @@ multiclass sve_int_while8_rr<bits<3> opc, string asm> {
   def _D : sve_int_while_rr<0b11, { 1, opc }, asm, GPR64, PPR64>;
 }
 
+class sve2_int_while_rr<bits<2> sz8_64, bits<1> rw, string asm,
+                        PPRRegOp pprty>
+: I<(outs pprty:$Pd), (ins GPR64:$Rn, GPR64:$Rm),
+  asm, "\t$Pd, $Rn, $Rm",
+  "", []>, Sched<[]> {
+  bits<4> Pd;
+  bits<5> Rm;
+  bits<5> Rn;
+  let Inst{31-24} = 0b00100101;
+  let Inst{23-22} = sz8_64;
+  let Inst{21}    = 0b1;
+  let Inst{20-16} = Rm;
+  let Inst{15-10} = 0b001100;
+  let Inst{9-5}   = Rn;
+  let Inst{4}     = rw;
+  let Inst{3-0}   = Pd;
+
+  let Defs = [NZCV];
+}
+
+multiclass sve2_int_while_rr<bits<1> rw, string asm> {
+  def _B : sve2_int_while_rr<0b00, rw, asm, PPR8>;
+  def _H : sve2_int_while_rr<0b01, rw, asm, PPR16>;
+  def _S : sve2_int_while_rr<0b10, rw, asm, PPR32>;
+  def _D : sve2_int_while_rr<0b11, rw, asm, PPR64>;
+}
 
 //===----------------------------------------------------------------------===//
 // SVE Floating Point Fast Reduction Group

diff --git a/test/MC/AArch64/SVE2/whilege-diagnostics.s b/test/MC/AArch64/SVE2/whilege-diagnostics.s
new file mode 100644 (file)
index 0000000..974deb0
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilege-diagnostics.s
@@ -0,0 +1,29 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid scalar registers
+
+whilege  p15.b, xzr, sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilege  p15.b, xzr, sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilege  p15.b, xzr, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilege  p15.b, xzr, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilege  p15.b, w0, x0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilege  p15.b, w0, x0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+whilege  p15, w0, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
+// CHECK-NEXT: whilege  p15, w0, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/whilege.s b/test/MC/AArch64/SVE2/whilege.s
new file mode 100644 (file)
index 0000000..a506794
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilege.s
@@ -0,0 +1,68 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+whilege  p15.b, xzr, x0
+// CHECK-INST: whilege p15.b, xzr, x0
+// CHECK-ENCODING: [0xef,0x13,0x20,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ef 13 20 25 <unknown>
+
+whilege  p15.b, x0, xzr
+// CHECK-INST: whilege p15.b, x0, xzr
+// CHECK-ENCODING: [0x0f,0x10,0x3f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 10 3f 25 <unknown>
+
+whilege  p15.b, wzr, w0
+// CHECK-INST: whilege p15.b, wzr, w0
+// CHECK-ENCODING: [0xef,0x03,0x20,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ef 03 20 25 <unknown>
+
+whilege  p15.b, w0, wzr
+// CHECK-INST: whilege p15.b, w0, wzr
+// CHECK-ENCODING: [0x0f,0x00,0x3f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 00 3f 25 <unknown>
+
+whilege  p15.h, x0, xzr
+// CHECK-INST: whilege p15.h, x0, xzr
+// CHECK-ENCODING: [0x0f,0x10,0x7f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 10 7f 25 <unknown>
+
+whilege  p15.h, w0, wzr
+// CHECK-INST: whilege p15.h, w0, wzr
+// CHECK-ENCODING: [0x0f,0x00,0x7f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 00 7f 25 <unknown>
+
+whilege  p15.s, x0, xzr
+// CHECK-INST: whilege p15.s, x0, xzr
+// CHECK-ENCODING: [0x0f,0x10,0xbf,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 10 bf 25 <unknown>
+
+whilege  p15.s, w0, wzr
+// CHECK-INST: whilege p15.s, w0, wzr
+// CHECK-ENCODING: [0x0f,0x00,0xbf,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 00 bf 25 <unknown>
+
+whilege  p15.d, w0, wzr
+// CHECK-INST: whilege p15.d, w0, wzr
+// CHECK-ENCODING: [0x0f,0x00,0xff,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 00 ff 25 <unknown>
+
+whilege  p15.d, x0, xzr
+// CHECK-INST: whilege p15.d, x0, xzr
+// CHECK-ENCODING: [0x0f,0x10,0xff,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 10 ff 25 <unknown>

diff --git a/test/MC/AArch64/SVE2/whilegt-diagnostics.s b/test/MC/AArch64/SVE2/whilegt-diagnostics.s
new file mode 100644 (file)
index 0000000..4d8e351
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilegt-diagnostics.s
@@ -0,0 +1,29 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid scalar registers
+
+whilegt  p15.b, xzr, sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilegt  p15.b, xzr, sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilegt  p15.b, xzr, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilegt  p15.b, xzr, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilegt  p15.b, w0, x0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilegt  p15.b, w0, x0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+whilegt  p15, w0, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
+// CHECK-NEXT: whilegt  p15, w0, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/whilegt.s b/test/MC/AArch64/SVE2/whilegt.s
new file mode 100644 (file)
index 0000000..3f307bc
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilegt.s
@@ -0,0 +1,68 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+whilegt  p15.b, xzr, x0
+// CHECK-INST: whilegt p15.b, xzr, x0
+// CHECK-ENCODING: [0xff,0x13,0x20,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff 13 20 25 <unknown>
+
+whilegt  p15.b, x0, xzr
+// CHECK-INST: whilegt p15.b, x0, xzr
+// CHECK-ENCODING: [0x1f,0x10,0x3f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 10 3f 25 <unknown>
+
+whilegt  p15.b, wzr, w0
+// CHECK-INST: whilegt p15.b, wzr, w0
+// CHECK-ENCODING: [0xff,0x03,0x20,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff 03 20 25 <unknown>
+
+whilegt  p15.b, w0, wzr
+// CHECK-INST: whilegt p15.b, w0, wzr
+// CHECK-ENCODING: [0x1f,0x00,0x3f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 00 3f 25 <unknown>
+
+whilegt  p15.h, x0, xzr
+// CHECK-INST: whilegt p15.h, x0, xzr
+// CHECK-ENCODING: [0x1f,0x10,0x7f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 10 7f 25 <unknown>
+
+whilegt  p15.h, w0, wzr
+// CHECK-INST: whilegt p15.h, w0, wzr
+// CHECK-ENCODING: [0x1f,0x00,0x7f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 00 7f 25 <unknown>
+
+whilegt  p15.s, x0, xzr
+// CHECK-INST: whilegt p15.s, x0, xzr
+// CHECK-ENCODING: [0x1f,0x10,0xbf,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 10 bf 25 <unknown>
+
+whilegt  p15.s, w0, wzr
+// CHECK-INST: whilegt p15.s, w0, wzr
+// CHECK-ENCODING: [0x1f,0x00,0xbf,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 00 bf 25 <unknown>
+
+whilegt  p15.d, w0, wzr
+// CHECK-INST: whilegt p15.d, w0, wzr
+// CHECK-ENCODING: [0x1f,0x00,0xff,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 00 ff 25 <unknown>
+
+whilegt  p15.d, x0, xzr
+// CHECK-INST: whilegt p15.d, x0, xzr
+// CHECK-ENCODING: [0x1f,0x10,0xff,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 10 ff 25 <unknown>

diff --git a/test/MC/AArch64/SVE2/whilehi-diagnostics.s b/test/MC/AArch64/SVE2/whilehi-diagnostics.s
new file mode 100644 (file)
index 0000000..d5c2784
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilehi-diagnostics.s
@@ -0,0 +1,29 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid scalar registers
+
+whilehi  p15.b, xzr, sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilehi  p15.b, xzr, sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilehi  p15.b, xzr, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilehi  p15.b, xzr, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilehi  p15.b, w0, x0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilehi  p15.b, w0, x0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+whilehi  p15, w0, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
+// CHECK-NEXT: whilehi  p15, w0, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/whilehi.s b/test/MC/AArch64/SVE2/whilehi.s
new file mode 100644 (file)
index 0000000..8e6272d
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilehi.s
@@ -0,0 +1,68 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+whilehi  p15.b, xzr, x0
+// CHECK-INST: whilehi p15.b, xzr, x0
+// CHECK-ENCODING: [0xff,0x1b,0x20,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff 1b 20 25 <unknown>
+
+whilehi  p15.b, x0, xzr
+// CHECK-INST: whilehi p15.b, x0, xzr
+// CHECK-ENCODING: [0x1f,0x18,0x3f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 18 3f 25 <unknown>
+
+whilehi  p15.b, wzr, w0
+// CHECK-INST: whilehi p15.b, wzr, w0
+// CHECK-ENCODING: [0xff,0x0b,0x20,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff 0b 20 25 <unknown>
+
+whilehi  p15.b, w0, wzr
+// CHECK-INST: whilehi p15.b, w0, wzr
+// CHECK-ENCODING: [0x1f,0x08,0x3f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 08 3f 25 <unknown>
+
+whilehi  p15.h, x0, xzr
+// CHECK-INST: whilehi p15.h, x0, xzr
+// CHECK-ENCODING: [0x1f,0x18,0x7f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 18 7f 25 <unknown>
+
+whilehi  p15.h, w0, wzr
+// CHECK-INST: whilehi p15.h, w0, wzr
+// CHECK-ENCODING: [0x1f,0x08,0x7f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 08 7f 25 <unknown>
+
+whilehi  p15.s, x0, xzr
+// CHECK-INST: whilehi p15.s, x0, xzr
+// CHECK-ENCODING: [0x1f,0x18,0xbf,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 18 bf 25 <unknown>
+
+whilehi  p15.s, w0, wzr
+// CHECK-INST: whilehi p15.s, w0, wzr
+// CHECK-ENCODING: [0x1f,0x08,0xbf,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 08 bf 25 <unknown>
+
+whilehi  p15.d, w0, wzr
+// CHECK-INST: whilehi p15.d, w0, wzr
+// CHECK-ENCODING: [0x1f,0x08,0xff,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 08 ff 25 <unknown>
+
+whilehi  p15.d, x0, xzr
+// CHECK-INST: whilehi p15.d, x0, xzr
+// CHECK-ENCODING: [0x1f,0x18,0xff,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 1f 18 ff 25 <unknown>

diff --git a/test/MC/AArch64/SVE2/whilehs-diagnostics.s b/test/MC/AArch64/SVE2/whilehs-diagnostics.s
new file mode 100644 (file)
index 0000000..b1ddafe
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilehs-diagnostics.s
@@ -0,0 +1,29 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid scalar registers
+
+whilehs  p15.b, xzr, sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilehs  p15.b, xzr, sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilehs  p15.b, xzr, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilehs  p15.b, xzr, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilehs  p15.b, w0, x0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilehs  p15.b, w0, x0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+whilehs  p15, w0, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
+// CHECK-NEXT: whilehs  p15, w0, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/whilehs.s b/test/MC/AArch64/SVE2/whilehs.s
new file mode 100644 (file)
index 0000000..1e01a19
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilehs.s
@@ -0,0 +1,68 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+whilehs  p15.b, xzr, x0
+// CHECK-INST: whilehs p15.b, xzr, x0
+// CHECK-ENCODING: [0xef,0x1b,0x20,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ef 1b 20 25 <unknown>
+
+whilehs  p15.b, x0, xzr
+// CHECK-INST: whilehs p15.b, x0, xzr
+// CHECK-ENCODING: [0x0f,0x18,0x3f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 18 3f 25 <unknown>
+
+whilehs  p15.b, wzr, w0
+// CHECK-INST: whilehs p15.b, wzr, w0
+// CHECK-ENCODING: [0xef,0x0b,0x20,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ef 0b 20 25 <unknown>
+
+whilehs  p15.b, w0, wzr
+// CHECK-INST: whilehs p15.b, w0, wzr
+// CHECK-ENCODING: [0x0f,0x08,0x3f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 08 3f 25 <unknown>
+
+whilehs  p15.h, x0, xzr
+// CHECK-INST: whilehs p15.h, x0, xzr
+// CHECK-ENCODING: [0x0f,0x18,0x7f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 18 7f 25 <unknown>
+
+whilehs  p15.h, w0, wzr
+// CHECK-INST: whilehs p15.h, w0, wzr
+// CHECK-ENCODING: [0x0f,0x08,0x7f,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 08 7f 25 <unknown>
+
+whilehs  p15.s, x0, xzr
+// CHECK-INST: whilehs p15.s, x0, xzr
+// CHECK-ENCODING: [0x0f,0x18,0xbf,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 18 bf 25 <unknown>
+
+whilehs  p15.s, w0, wzr
+// CHECK-INST: whilehs p15.s, w0, wzr
+// CHECK-ENCODING: [0x0f,0x08,0xbf,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 08 bf 25 <unknown>
+
+whilehs  p15.d, w0, wzr
+// CHECK-INST: whilehs p15.d, w0, wzr
+// CHECK-ENCODING: [0x0f,0x08,0xff,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 08 ff 25 <unknown>
+
+whilehs  p15.d, x0, xzr
+// CHECK-INST: whilehs p15.d, x0, xzr
+// CHECK-ENCODING: [0x0f,0x18,0xff,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: 0f 18 ff 25 <unknown>

diff --git a/test/MC/AArch64/SVE2/whilerw-diagnostics.s b/test/MC/AArch64/SVE2/whilerw-diagnostics.s
new file mode 100644 (file)
index 0000000..5ea3b6d
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilerw-diagnostics.s
@@ -0,0 +1,25 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid scalar registers
+
+whilerw  p15.b, xzr, sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilerw  p15.b, xzr, sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilerw  p15.b, xzr, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilerw  p15.b, xzr, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilerw  p15.b, w0, x0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilerw  p15.b, w0, x0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilerw  p15.b, w0, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilerw  p15.b, w0, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/whilerw.s b/test/MC/AArch64/SVE2/whilerw.s
new file mode 100644 (file)
index 0000000..b4a5bd0
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilerw.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+whilerw  p15.b, x30, x30
+// CHECK-INST: whilerw  p15.b, x30, x30
+// CHECK-ENCODING: [0xdf,0x33,0x3e,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: df 33 3e 25 <unknown>
+
+whilerw  p15.h, x30, x30
+// CHECK-INST: whilerw  p15.h, x30, x30
+// CHECK-ENCODING: [0xdf,0x33,0x7e,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: df 33 7e 25 <unknown>
+
+whilerw  p15.s, x30, x30
+// CHECK-INST: whilerw  p15.s, x30, x30
+// CHECK-ENCODING: [0xdf,0x33,0xbe,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: df 33 be 25 <unknown>
+
+whilerw  p15.d, x30, x30
+// CHECK-INST: whilerw  p15.d, x30, x30
+// CHECK-ENCODING: [0xdf,0x33,0xfe,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: df 33 fe 25 <unknown>

diff --git a/test/MC/AArch64/SVE2/whilewr-diagnostics.s b/test/MC/AArch64/SVE2/whilewr-diagnostics.s
new file mode 100644 (file)
index 0000000..b2e2029
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilewr-diagnostics.s
@@ -0,0 +1,25 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid scalar registers
+
+whilewr  p15.b, xzr, sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilewr  p15.b, xzr, sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilewr  p15.b, xzr, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilewr  p15.b, xzr, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilewr  p15.b, w0, x0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilewr  p15.b, w0, x0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+whilewr  p15.b, w0, w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: whilewr  p15.b, w0, w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/whilewr.s b/test/MC/AArch64/SVE2/whilewr.s
new file mode 100644 (file)
index 0000000..588d1b2
--- /dev/null
+++ b/test/MC/AArch64/SVE2/whilewr.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+whilewr  p15.b, x30, x30
+// CHECK-INST: whilewr  p15.b, x30, x30
+// CHECK-ENCODING: [0xcf,0x33,0x3e,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: cf 33 3e 25 <unknown>
+
+whilewr  p15.h, x30, x30
+// CHECK-INST: whilewr  p15.h, x30, x30
+// CHECK-ENCODING: [0xcf,0x33,0x7e,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: cf 33 7e 25 <unknown>
+
+whilewr  p15.s, x30, x30
+// CHECK-INST: whilewr  p15.s, x30, x30
+// CHECK-ENCODING: [0xcf,0x33,0xbe,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: cf 33 be 25 <unknown>
+
+whilewr  p15.d, x30, x30
+// CHECK-INST: whilewr  p15.d, x30, x30
+// CHECK-ENCODING: [0xcf,0x33,0xfe,0x25]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: cf 33 fe 25 <unknown>