#define LLVM_LIB_TARGET_AMDGPU_AMDGPUARGUMENTUSAGEINFO_H
#include "llvm/ADT/DenseMap.h"
+#include "llvm/CodeGen/Register.h"
#include "llvm/IR/Function.h"
#include "llvm/Pass.h"
friend class AMDGPUArgumentUsageInfo;
union {
- unsigned Register;
+ Register Reg;
unsigned StackOffset;
};
public:
ArgDescriptor(unsigned Val = 0, unsigned Mask = ~0u,
bool IsStack = false, bool IsSet = false)
- : Register(Val), Mask(Mask), IsStack(IsStack), IsSet(IsSet) {}
+ : Reg(Val), Mask(Mask), IsStack(IsStack), IsSet(IsSet) {}
- static ArgDescriptor createRegister(unsigned Reg, unsigned Mask = ~0u) {
+ static ArgDescriptor createRegister(Register Reg, unsigned Mask = ~0u) {
return ArgDescriptor(Reg, Mask, false, true);
}
- static ArgDescriptor createStack(unsigned Reg, unsigned Mask = ~0u) {
+ static ArgDescriptor createStack(Register Reg, unsigned Mask = ~0u) {
return ArgDescriptor(Reg, Mask, true, true);
}
static ArgDescriptor createArg(const ArgDescriptor &Arg, unsigned Mask) {
- return ArgDescriptor(Arg.Register, Mask, Arg.IsStack, Arg.IsSet);
+ return ArgDescriptor(Arg.Reg, Mask, Arg.IsStack, Arg.IsSet);
}
bool isSet() const {
return !IsStack;
}
- unsigned getRegister() const {
+ Register getRegister() const {
assert(!IsStack);
- return Register;
+ return Reg;
}
unsigned getStackOffset() const {
return ArgInfo.getPreloadedValue(Value);
}
- unsigned getPreloadedReg(AMDGPUFunctionArgInfo::PreloadedValue Value) const {
+ Register getPreloadedReg(AMDGPUFunctionArgInfo::PreloadedValue Value) const {
auto Arg = ArgInfo.getPreloadedValue(Value).first;
- return Arg ? Arg->getRegister() : 0;
+ return Arg ? Arg->getRegister() : Register();
}
unsigned getGITPtrHigh() const {