[Hexagon] Add -mhvx option to the Hexagon backend

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297393 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp b/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
index 22d99bfb3712718d6aef5b850e14737d6ed94851..bb98c2bbef6d7134a28547264550e27a1a0c528e 100644 (file)
--- a/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
+++ b/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
@@ -70,6 +70,9 @@ static cl::opt<bool> HexagonV60ArchVariant("mv60", cl::Hidden, cl::init(false),
 static cl::opt<bool> HexagonV62ArchVariant("mv62", cl::Hidden, cl::init(false),
   cl::desc("Build for Hexagon V62"));
 
+static cl::opt<bool> EnableHVX("mhvx", cl::Hidden, cl::init(false),
+  cl::desc("Enable Hexagon Vector Extension (HVX)"));
+
 static StringRef DefaultArch = "hexagonv60";
 
 static StringRef HexagonGetArchVariant() {
@@ -249,8 +252,11 @@ static bool LLVM_ATTRIBUTE_UNUSED checkFeature(MCSubtargetInfo* STI, uint64_t F)
 StringRef Hexagon_MC::ParseHexagonTriple(const Triple &TT, StringRef CPU) {
   StringRef CPUName = Hexagon_MC::selectHexagonCPU(TT, CPU);
   StringRef FS = "";
-  if (CPUName.equals_lower("hexagonv60") || CPUName.equals_lower("hexagonv62"))
-    FS = "+hvx";
+  if (EnableHVX) {
+    if (CPUName.equals_lower("hexagonv60") ||
+        CPUName.equals_lower("hexagonv62"))
+      FS = "+hvx";
+  }
   return FS;
 }