]> granicus.if.org Git - llvm/commitdiff
DAG: Remove pointless type check
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 1 Jun 2017 14:49:46 +0000 (14:49 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 1 Jun 2017 14:49:46 +0000 (14:49 +0000)
These are only integer operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304417 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

index d6aec69bbf1254e433609325fa3037be557ab041..b1df262a18475f8d2ba502d1fb483d3e9c8f4025 100644 (file)
@@ -1960,7 +1960,7 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
 
   // fold (a+b) -> (a|b) iff a and b share no bits.
   if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) &&
-      VT.isInteger() && DAG.haveNoCommonBitsSet(N0, N1))
+      DAG.haveNoCommonBitsSet(N0, N1))
     return DAG.getNode(ISD::OR, DL, VT, N0, N1);
 
   if (SDValue Combined = visitADDLike(N0, N1, N))