#define __INTRIN_H
/* First include the standard intrinsics. */
+#if defined(__i386__) || defined(__x86_64__)
#include <x86intrin.h>
+#endif
/* For the definition of jmp_buf. */
#include <setjmp.h>
*a = *a | (1 << b);
return x;
}
+#if defined(__i386__) || defined(__x86_64__)
static __inline__ unsigned char __attribute__((__always_inline__, __nodebug__))
_interlockedbittestandset(long volatile *__BitBase, long __BitPos) {
unsigned char __Res;
: "Ir"(__BitPos));
return __Res;
}
+#endif
#ifdef __x86_64__
static __inline__ unsigned char __attribute__((__always_inline__, __nodebug__))
_BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask) {
/*----------------------------------------------------------------------------*\
|* Barriers
\*----------------------------------------------------------------------------*/
+#if defined(__i386__) || defined(__x86_64__)
static __inline__ void __attribute__((__always_inline__, __nodebug__))
__attribute__((deprecated("use other intrinsics or C++11 atomics instead")))
_ReadWriteBarrier(void) {
_WriteBarrier(void) {
__asm__ volatile ("" : : : "memory");
}
+#endif
#ifdef __x86_64__
static __inline__ void __attribute__((__always_inline__, __nodebug__))
__faststorefence(void) {
/*----------------------------------------------------------------------------*\
|* movs, stos
\*----------------------------------------------------------------------------*/
+#if defined(__i386__) || defined(__x86_64__)
static __inline__ void __attribute__((__always_inline__, __nodebug__))
__movsb(unsigned char *__dst, unsigned char const *__src, size_t __n) {
__asm__("rep movsb" : : "D"(__dst), "S"(__src), "c"(__n)
__asm__("rep stosh" : : "D"(__dst), "a"(__x), "c"(__n)
: "%edi", "%ecx");
}
+#endif
#ifdef __x86_64__
static __inline__ void __attribute__((__always_inline__, __nodebug__))
__movsq(unsigned long long *__dst, unsigned long long const *__src, size_t __n) {
_ReturnAddress(void) {
return __builtin_return_address(0);
}
+#if defined(__i386__) || defined(__x86_64__)
static __inline__ void __attribute__((__always_inline__, __nodebug__))
__cpuid(int __info[4], int __level) {
__asm__ ("cpuid" : "=a"(__info[0]), "=b" (__info[1]), "=c"(__info[2]), "=d"(__info[3])
__halt(void) {
__asm__ volatile ("hlt");
}
+#endif
/*----------------------------------------------------------------------------*\
|* Privileged intrinsics
\*----------------------------------------------------------------------------*/
+#if defined(__i386__) || defined(__x86_64__)
static __inline__ unsigned __int64 __attribute__((__always_inline__, __nodebug__))
__readmsr(unsigned long __register) {
// Loads the contents of a 64-bit model specific register (MSR) specified in
__writecr3(unsigned int __cr3_val) {
__asm__ ("mov %0, %%cr3" : : "q"(__cr3_val) : "memory");
}
+#endif
#ifdef __cplusplus
}