component/esp32 : update rtc phy lib

RTC V230
add BT AGC saturation protection, replace RTC V229.

PHY V362
Power up print: "phy_version: 362.0, 61e8d92, Sep 8 2017, 18:48:13"
1. esp_init_data_v3.bin
modify TX target power
modify WIFI & BT RX gain table
2. modify phy_close_rf()
3. add phy_set_most_tpw()
4. 26M crystal work OK
5. noise_check_loop ok

diff --git a/components/esp32/include/esp_phy_init.h b/components/esp32/include/esp_phy_init.h
index 347d8acaca90d13dbe3281b7ca9bb88663c93377..1c7e34217fa9d0aa4fd0e865d918f3ec24639cb9 100644 (file)
--- a/components/esp32/include/esp_phy_init.h
+++ b/components/esp32/include/esp_phy_init.h
@@ -135,7 +135,9 @@ typedef struct {
        uint8_t spur_freq_cfg_div_3;            /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_3 */
        uint8_t spur_freq_en_h_3;               /*!< the seventh bit for total enable */
        uint8_t spur_freq_en_l_3;               /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority, */
-       uint8_t reserved[23];                   /*!< reserved for future expansion */
+       uint8_t force_freq_offset_enable;
+       uint8_t force_freq_offset_num;
+       uint8_t reserved[21];                   /*!< reserved for future expansion */
 } esp_phy_init_data_t;
 
 /**

diff --git a/components/esp32/lib b/components/esp32/lib
index de415111bd45cbc4147bfe5f6d4fcdc757b7748c..f607c800b2ffc12ed88d0cbaf2d3d784aa1ce928 160000 (submodule)
--- a/components/esp32/lib
+++ b/components/esp32/lib
@@ -1 +1 @@
-Subproject commit de415111bd45cbc4147bfe5f6d4fcdc757b7748c
+Subproject commit f607c800b2ffc12ed88d0cbaf2d3d784aa1ce928

diff --git a/components/esp32/phy_init_data.h b/components/esp32/phy_init_data.h
index ea6a761b35d359025a5859f6c4dd9dd48517513a..2ef8534fffe562bf96649cd312a0e267f2f93faa 100644 (file)
--- a/components/esp32/phy_init_data.h
+++ b/components/esp32/phy_init_data.h
@@ -27,13 +27,13 @@ static const char phy_init_magic_pre[] = PHY_INIT_MAGIC;
  * @brief Structure containing default recommended PHY initialization parameters.
  */
 static const esp_phy_init_data_t phy_init_data= {
-        .param_ver_id = 1,
+        .param_ver_id = 3,
         .crystal_select = 3,
         .wifi_rx_gain_swp_step_1 = 0x05,
-        .wifi_rx_gain_swp_step_2 = 0x04,
+        .wifi_rx_gain_swp_step_2 = 0x09,
         .wifi_rx_gain_swp_step_3 = 0x06,
         .wifi_rx_gain_swp_step_4 = 0x05,
-        .wifi_rx_gain_swp_step_5 = 0x01,
+        .wifi_rx_gain_swp_step_5 = 0x03,
         .wifi_rx_gain_swp_step_6 = 0x06,
         .wifi_rx_gain_swp_step_7 = 0x05,
         .wifi_rx_gain_swp_step_8 = 0x04,
@@ -45,10 +45,10 @@ static const esp_phy_init_data_t phy_init_data= {
         .wifi_rx_gain_swp_step_14 = 0x00,
         .wifi_rx_gain_swp_step_15 = 0x00,
         .bt_rx_gain_swp_step_1 = 0x05,
-        .bt_rx_gain_swp_step_2 = 0x04,
+        .bt_rx_gain_swp_step_2 = 0x09,
         .bt_rx_gain_swp_step_3 = 0x06,
         .bt_rx_gain_swp_step_4 = 0x05,
-        .bt_rx_gain_swp_step_5 = 0x01,
+        .bt_rx_gain_swp_step_5 = 0x03,
         .bt_rx_gain_swp_step_6 = 0x06,
         .bt_rx_gain_swp_step_7 = 0x05,
         .bt_rx_gain_swp_step_8 = 0x00,
@@ -59,9 +59,9 @@ static const esp_phy_init_data_t phy_init_data= {
         .bt_rx_gain_swp_step_13 = 0x00,
         .bt_rx_gain_swp_step_14 = 0x00,
         .bt_rx_gain_swp_step_15 = 0x00,
-        .gain_cmp_1 = 0x0a,
-        .gain_cmp_6 = 0x0a,
-        .gain_cmp_11 = 0x0c,
+        .gain_cmp_1 = 0xfc,
+        .gain_cmp_6 = 0xfc,
+        .gain_cmp_11 = 0xfe,
         .gain_cmp_ext2_1 = 0xf0,
         .gain_cmp_ext2_6 = 0xf0,
         .gain_cmp_ext2_11 = 0xf0,
@@ -72,15 +72,15 @@ static const esp_phy_init_data_t phy_init_data= {
         .gain_cmp_bt_ofs_6 = 0x18,
         .gain_cmp_bt_ofs_11 = 0x18,
         .target_power_qdb_0 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 78),
-        .target_power_qdb_1 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 76),
-        .target_power_qdb_2 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 74),
-        .target_power_qdb_3 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 68),
-        .target_power_qdb_4 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 60),
+        .target_power_qdb_1 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 72),
+        .target_power_qdb_2 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 66),
+        .target_power_qdb_3 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 60),
+        .target_power_qdb_4 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 56),
         .target_power_qdb_5 = LIMIT(CONFIG_ESP32_PHY_MAX_TX_POWER * 4, 0, 52),
         .target_power_index_mcs0 = 0,
-        .target_power_index_mcs1 = 0,
+        .target_power_index_mcs1 = 1,
         .target_power_index_mcs2 = 1,
-        .target_power_index_mcs3 = 1,
+        .target_power_index_mcs3 = 2,
         .target_power_index_mcs4 = 2,
         .target_power_index_mcs5 = 3,
         .target_power_index_mcs6 = 4,
@@ -132,6 +132,8 @@ static const esp_phy_init_data_t phy_init_data= {
         .spur_freq_cfg_div_3 = 0,
         .spur_freq_en_h_3 = 0,
         .spur_freq_en_l_3 = 0,
+        .force_freq_offset_enable = 0,
+        .force_freq_offset_num = 0,
         .reserved = {0}
 };