[ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer

The new addressing mode added for the v8.2A FP16 instructions uses bit 8 of the
immediate to encode the sign of the offset, like the other FP loads/stores, so
need to be treated the same way.

Differential revision: https://reviews.llvm.org/D58816

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355201 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp
index 1ed35fb3d3833af5e36203360504db665fbca7d2..6ddd71cf8d3e46203823aa7d31d7146211c5c0a5 100644 (file)
--- a/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -638,7 +638,7 @@ bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
       // Replace the FrameIndex with fp/sp
       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
       if (isSub) {
-        if (AddrMode == ARMII::AddrMode5)
+        if (AddrMode == ARMII::AddrMode5 || AddrMode == ARMII::AddrMode5FP16)
           // FIXME: Not consistent.
           ImmedOffset |= 1 << NumBits;
         else
@@ -652,7 +652,7 @@ bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
     // Otherwise, offset doesn't fit. Pull in what we can to simplify
     ImmedOffset = ImmedOffset & Mask;
     if (isSub) {
-      if (AddrMode == ARMII::AddrMode5)
+      if (AddrMode == ARMII::AddrMode5 || AddrMode == ARMII::AddrMode5FP16)
         // FIXME: Not consistent.
         ImmedOffset |= 1 << NumBits;
       else {

diff --git a/test/CodeGen/ARM/fp16-frame-lowering.ll b/test/CodeGen/ARM/fp16-frame-lowering.ll
new file mode 100644 (file)
index 0000000..a9ffc39
--- /dev/null
+++ b/test/CodeGen/ARM/fp16-frame-lowering.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mtriple armv8a--none-eabi -mattr=+fullfp16             | FileCheck %s
+; RUN: llc < %s -mtriple armv8a--none-eabi -mattr=+fullfp16,+thumb-mode | FileCheck %s
+
+; Check that frame lowering for the fp16 instructions works correctly with
+; negative offsets (which happens when using the frame pointer).
+
+define void @foo(i32 %count) {
+entry:
+  %half_alloca = alloca half, align 2
+; CHECK: vstr.16 {{s[0-9]+}}, [{{r[0-9]+}}, #-10]
+  store half 0.0, half* %half_alloca
+  call void @bar(half* %half_alloca)
+
+  ; A variable-sized alloca to force the above store to use the frame pointer
+  ; instead of the stack pointer, and so need a negative offset.
+  %var_alloca = alloca i32, i32 %count
+  call void @baz(i32* %var_alloca)
+  ret void
+}
+
+declare void @bar(half*)
+declare void @baz(i32*)