RuntimeDyldELF: add LDST8_ABS_LO12_NC and LDST16_ABS_LO12_NC relocs

Differential revision: https://reviews.llvm.org/D28863

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292785 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
index 05615d3cc6cf909818be59df958e6adb3e31061f..d2f30deff926c20726ca63f8d41a251a5e6fc595 100644 (file)
--- a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
+++ b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
@@ -419,6 +419,18 @@ void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
     // from bits 11:0 of X
     or32AArch64Imm(TargetPtr, Value + Addend);
     break;
+  case ELF::R_AARCH64_LDST8_ABS_LO12_NC:
+    // Operation: S + A
+    // Immediate goes in bits 21:10 of LD/ST instruction, taken
+    // from bits 11:0 of X
+    or32AArch64Imm(TargetPtr, getBits(Value + Addend, 0, 11));
+    break;
+  case ELF::R_AARCH64_LDST16_ABS_LO12_NC:
+    // Operation: S + A
+    // Immediate goes in bits 21:10 of LD/ST instruction, taken
+    // from bits 11:1 of X
+    or32AArch64Imm(TargetPtr, getBits(Value + Addend, 1, 11));
+    break;
   case ELF::R_AARCH64_LDST32_ABS_LO12_NC:
     // Operation: S + A
     // Immediate goes in bits 21:10 of LD/ST instruction, taken
@@ -900,7 +912,7 @@ uint32_t RuntimeDyldELF::getMatchingLoRelocation(uint32_t RelType,
 }
 
 // Sometimes we don't need to create thunk for a branch.
-// This typically happens when branch target is located 
+// This typically happens when branch target is located
 // in the same object file. In such case target is either
 // a weak symbol or symbol in a different executable section.
 // This function checks if branch target is located in the

diff --git a/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s b/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s
index 069170bdf36bdf8fd817ade76737afa0d10dac26..9f21f974da9205bed3a8ade31ab9c962b8deb210 100644 (file)
--- a/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s
+++ b/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s
@@ -20,6 +20,10 @@ g:
 # R_AARCH64_MOVW_UABS_G0_NC
         movk    x0, #:abs_g0_nc:f
 l:
+# R_AARCH64_LDST8_ABS_LO12_NC
+        ldrsb x4, [x5, :lo12:a+1]
+# R_AARCH64_LDST16_ABS_LO12_NC
+        ldrh w4, [x5, :lo12:a+2]
 # R_AARCH64_LDST32_ABS_LO12_NC
         ldr s4, [x5, :lo12:a]
 # R_AARCH64_LDST64_ABS_LO12_NC
@@ -57,9 +61,11 @@ r:
 # rtdyld-check: *{4}(g + 8) = 0xf2b13560
 # rtdyld-check: *{4}(g + 12) = 0xf299bde0
 
-## Check LDST32_ABS_LO12_NC and LDST64_ABS_LO12_NC
-# rtdyld-check: (*{4}l)[21:10] = a[11:2]
-# rtdyld-check: (*{4}(l+4))[21:10] = a[11:3]
+## Check LDSTXX_ABS_LO12_NC
+# rtdyld-check: (*{4}l)[21:10] = (a+1)[11:0]
+# rtdyld-check: (*{4}(l+4))[21:10] = (a+2)[11:1]
+# rtdyld-check: (*{4}(l+8))[21:10] = a[11:2]
+# rtdyld-check: (*{4}(l+12))[21:10] = a[11:3]
 
 ## Check ADR_PREL_PG_HI21. Low order bits of immediate value
 ## go to bits 30:29. High order bits go to bits 23:5