let SubtargetPredicate = isCIVI;
let FLAT = 1;
- // Internally, FLAT instruction are executed as both an LDS and a
- // Buffer instruction; so, they increment both VM_CNT and LGKM_CNT
- // and are not considered done until both have been decremented.
- let VM_CNT = 1;
- let LGKM_CNT = 1;
let UseNamedOperandTable = 1;
let hasSideEffects = 0;
// TODO: M0 if it could possibly access LDS (before gfx9? only)?
let Uses = !if(is_flat_global, [EXEC], [EXEC, FLAT_SCR]);
+
+ // Internally, FLAT instruction are executed as both an LDS and a
+ // Buffer instruction; so, they increment both VM_CNT and LGKM_CNT
+ // and are not considered done until both have been decremented.
+ let VM_CNT = 1;
+ let LGKM_CNT = !if(!or(is_flat_global, is_flat_scratch), 0, 1);
}
class FLAT_Real <bits<7> op, FLAT_Pseudo ps> :
// instruction, update the upper-bound of the appropriate counter's
// bracket and the destination operand scores.
// TODO: Use the (TSFlags & SIInstrFlags::LGKM_CNT) property everywhere.
- uint64_t TSFlags = Inst.getDesc().TSFlags;
- if (TII->isDS(Inst) && (TSFlags & SIInstrFlags::LGKM_CNT)) {
+ if (TII->isDS(Inst) && TII->usesLGKM_CNT(Inst)) {
if (TII->getNamedOperand(Inst, AMDGPU::OpName::gds) &&
TII->getNamedOperand(Inst, AMDGPU::OpName::gds)->getImm() != 0) {
ScoreBrackets->updateByEvent(TII, TRI, MRI, GDS_ACCESS, Inst);
}
} else if (TII->isFLAT(Inst)) {
assert(Inst.mayLoad() || Inst.mayStore());
- ScoreBrackets->updateByEvent(TII, TRI, MRI, VMEM_ACCESS, Inst);
- ScoreBrackets->updateByEvent(TII, TRI, MRI, LDS_ACCESS, Inst);
+
+ if (TII->usesVM_CNT(Inst))
+ ScoreBrackets->updateByEvent(TII, TRI, MRI, VMEM_ACCESS, Inst);
+
+ if (TII->usesLGKM_CNT(Inst))
+ ScoreBrackets->updateByEvent(TII, TRI, MRI, LDS_ACCESS, Inst);
// This is a flat memory operation. Check to see if it has memory
// tokens for both LDS and Memory, and if so mark it as a flat.
return MI.getDesc().TSFlags & SIInstrFlags::VM_CNT;
}
+ static bool usesLGKM_CNT(const MachineInstr &MI) {
+ return MI.getDesc().TSFlags & SIInstrFlags::LGKM_CNT;
+ }
+
static bool sopkIsZext(const MachineInstr &MI) {
return MI.getDesc().TSFlags & SIInstrFlags::SOPK_ZEXT;
}