]> granicus.if.org Git - llvm/commitdiff
[X86] SimplifyDemandedVectorElts - add VPPERM support
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 11 Apr 2019 13:30:38 +0000 (13:30 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 11 Apr 2019 13:30:38 +0000 (13:30 +0000)
We need to add support for all variable shuffle mask ops, but VPPERM is the only one that already has test coverage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358165 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/oddshuffles.ll

index 190d5708324a2136d77ce581803e3dab25a83d37..223d0923c7f9a9ea4e196511834cf69576f79649 100644 (file)
@@ -33234,6 +33234,15 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
       return true;
     break;
   }
+  case X86ISD::VPPERM: {
+    // TODO - simplify other variable shuffle masks.
+    SDValue Mask = Op.getOperand(2);
+    APInt MaskUndef, MaskZero;
+    if (SimplifyDemandedVectorElts(Mask, DemandedElts, MaskUndef, MaskZero, TLO,
+                                   Depth + 1))
+      return true;
+    break;
+  }
   case X86ISD::HADD:
   case X86ISD::HSUB:
   case X86ISD::FHADD:
index 78f6611ed4676af76bbe585b80716ca66e7b0963..131535e61f958a6aae62811ff04727db12dd3ae1 100644 (file)
@@ -1241,7 +1241,7 @@ define void @interleave_24i16_in(<24 x i16>* %p, <8 x i16>* %q1, <8 x i16>* %q2,
 ; XOP-NEXT:    vmovdqu (%rsi), %xmm0
 ; XOP-NEXT:    vmovdqu (%rdx), %xmm1
 ; XOP-NEXT:    vmovdqu (%rcx), %xmm2
-; XOP-NEXT:    vpperm {{.*#+}} xmm3 = xmm0[4,5,6,7],xmm1[6,7],xmm0[6,7,8,9],xmm1[8,9],xmm0[8,9,10,11]
+; XOP-NEXT:    vpperm {{.*#+}} xmm3 = xmm0[u,u,6,7],xmm1[6,7],xmm0[u,u,8,9],xmm1[8,9],xmm0[u,u,10,11]
 ; XOP-NEXT:    vpshufd {{.*#+}} xmm4 = xmm2[1,1,2,2]
 ; XOP-NEXT:    vpblendw {{.*#+}} xmm3 = xmm4[0],xmm3[1,2],xmm4[3],xmm3[4,5],xmm4[6],xmm3[7]
 ; XOP-NEXT:    vpunpcklwd {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]