#include "esp_spi_flash.h"
#include "esp_ipc.h"
#include "esp_log.h"
-#include "esp_deepsleep.h"
void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default")));
void start_cpu0_default(void) IRAM_ATTR;
#include "rom/cache.h"
#include "rom/rtc.h"
#include "soc/rtc_cntl_reg.h"
+#include "soc/dport_reg.h"
#include "esp_attr.h"
#include "esp_deepsleep.h"
}
void RTC_IRAM_ATTR esp_default_wake_deep_sleep(void) {
- mmu_init(0);
+ //
+ //mmu_init(0);
+ REG_SET_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR);
+ REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR);
}
void __attribute__((weak, alias("esp_default_wake_deep_sleep"))) esp_wake_deep_sleep(void);
*
* @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
*
- * @param uint32_t crc_len : 0 - 0x7ff, 0 for 1 byte, 0x7ff for 0x800 byte.
+ * @param uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
*
* @return uint32_t : CRC32 result
*/