]> granicus.if.org Git - llvm/commitdiff
[TargetInstrInfo] replace redundant expression in getMemOpBaseRegImmOfs
authorMichael LeMay <michael.lemay@intel.com>
Mon, 19 Dec 2016 21:02:41 +0000 (21:02 +0000)
committerMichael LeMay <michael.lemay@intel.com>
Mon, 19 Dec 2016 21:02:41 +0000 (21:02 +0000)
Summary:
The expression for computing the return value of getMemOpBaseRegImmOfs has only
one possible value. The other value would result in a return earlier in the
function. This patch replaces the expression with its only possible value.

Reviewers: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27437

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290133 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstrInfo.cpp

index 8481417b00917394c5eca5aee5122d4951ca5173..4a6d337a9bd5b689745c26d86f27bfb3ab6a5bcb 100644 (file)
@@ -5969,8 +5969,7 @@ bool X86InstrInfo::getMemOpBaseRegImmOfs(MachineInstr &MemOp, unsigned &BaseReg,
 
   Offset = DispMO.getImm();
 
-  return MemOp.getOperand(MemRefBegin + X86::AddrIndexReg).getReg() ==
-         X86::NoRegister;
+  return true;
 }
 
 static unsigned getStoreRegOpcode(unsigned SrcReg,