]> granicus.if.org Git - clang/commitdiff
[CLANG] [AVX512] [BUILTIN] Adding PSRA{W|WI}{128|256|512}.
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Wed, 2 Mar 2016 12:06:06 +0000 (12:06 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Wed, 2 Mar 2016 12:06:06 +0000 (12:06 +0000)
Differential Revision: http://reviews.llvm.org/D17706

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@262481 91177308-0d34-0410-b5e6-96231b3b80d8

include/clang/Basic/BuiltinsX86.def
lib/Headers/avx512bwintrin.h
lib/Headers/avx512vlbwintrin.h
test/CodeGen/avx512bw-builtins.c

index e602088234a3c7eeef168ce9012e30be7fb93f40..bfe071a63ee8e816ad97bace10ae728d70def0a9 100644 (file)
@@ -1685,6 +1685,12 @@ TARGET_BUILTIN(__builtin_ia32_psrav4si_mask, "V4iV4iV4iV4iUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_psrav8si_mask, "V8iV8iV8iV8iUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_psravq128_mask, "V2LLiV2LLiV2LLiV2LLiUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_psravq256_mask, "V4LLiV4LLiV4LLiV4LLiUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psraw512_mask, "V32sV32sV8sV32sUi","","avx512bw")
+TARGET_BUILTIN(__builtin_ia32_psrawi512_mask, "V32sV32sIiV32sUi","","avx512bw")
+TARGET_BUILTIN(__builtin_ia32_psraw128_mask, "V8sV8sV8sV8sUc","","avx512bw,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psraw256_mask, "V16sV16sV8sV16sUs","","avx512bw,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrawi128_mask, "V8sV8sIiV8sUc","","avx512bw,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrawi256_mask, "V16sV16sIiV16sUs","","avx512bw,avx512vl")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN
index 8c0e7da697d8c1fdf8531fc157e8c91df132986e..7f3f1bf4f027b5772f0d499871da3f32849d7561 100644 (file)
@@ -1778,6 +1778,57 @@ _mm512_maskz_srav_epi16 (__mmask32 __U, __m512i __A, __m512i __B)
               _mm512_setzero_hi (),
               (__mmask32) __U);
 }
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_sra_epi16 (__m512i __A, __m128i __B)
+{
+ return (__m512i) __builtin_ia32_psraw512_mask ((__v32hi) __A,
+             (__v8hi) __B,
+             (__v32hi)
+             _mm512_setzero_hi (),
+             (__mmask32) -1);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mask_sra_epi16 (__m512i __W, __mmask32 __U, __m512i __A,
+           __m128i __B)
+{
+  return (__m512i) __builtin_ia32_psraw512_mask ((__v32hi) __A,
+             (__v8hi) __B,
+             (__v32hi) __W,
+            (__mmask32) __U);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_maskz_sra_epi16 (__mmask32 __U, __m512i __A, __m128i __B)
+{
+  return (__m512i) __builtin_ia32_psraw512_mask ((__v32hi) __A,
+             (__v8hi) __B,
+             (__v32hi)
+             _mm512_setzero_hi (),
+            (__mmask32) __U);
+}
+
+#define _mm512_srai_epi16( __A, __B) __extension__ ({ \
+__builtin_ia32_psrawi512_mask ((__v32hi)( __A),( __B),\
+              (__v32hi)\
+              _mm512_setzero_hi (),\
+              (__mmask32) -2);\
+})
+
+#define _mm512_mask_srai_epi16( __W, __U, __A, __B) __extension__ ({ \
+__builtin_ia32_psrawi512_mask ((__v32hi)( __A),( __B),\
+              (__v32hi)( __W),\
+              (__mmask32)( __U));\
+})
+
+#define _mm512_maskz_srai_epi16( __U, __A, __B) __extension__ ({ \
+__builtin_ia32_psrawi512_mask ((__v32hi)( __A),( __B),\
+              (__v32hi)\
+              _mm512_setzero_hi (),\
+              (__mmask32)( __U));\
+})
+
 #undef __DEFAULT_FN_ATTRS
 
 #endif
index 7184e1c109da8b4698b12650b950b3619549a101..a4b8ff9a068318ce19f86deb9f80e6e32635709e 100644 (file)
@@ -2715,6 +2715,72 @@ _mm_maskz_srav_epi16 (__mmask8 __U, __m128i __A, __m128i __B)
              (__mmask8) __U);
 }
 
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask_sra_epi16 (__m128i __W, __mmask8 __U, __m128i __A,
+        __m128i __B)
+{
+  return (__m128i) __builtin_ia32_psraw128_mask ((__v8hi) __A,
+             (__v8hi) __B,
+             (__v8hi) __W,
+             (__mmask8) __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_maskz_sra_epi16 (__mmask8 __U, __m128i __A, __m128i __B)
+{
+  return (__m128i) __builtin_ia32_psraw128_mask ((__v8hi) __A,
+             (__v8hi) __B,
+             (__v8hi)
+             _mm_setzero_si128 (),
+             (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask_sra_epi16 (__m256i __W, __mmask16 __U, __m256i __A,
+           __m128i __B)
+{
+  return (__m256i) __builtin_ia32_psraw256_mask ((__v16hi) __A,
+             (__v8hi) __B,
+             (__v16hi) __W,
+             (__mmask16) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_maskz_sra_epi16 (__mmask16 __U, __m256i __A, __m128i __B)
+{
+  return (__m256i) __builtin_ia32_psraw256_mask ((__v16hi) __A,
+             (__v8hi) __B,
+             (__v16hi)
+             _mm256_setzero_si256 (),
+             (__mmask16) __U);
+}
+
+#define _mm_mask_srai_epi16( __W, __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrawi128_mask ((__v8hi)( __A),( __imm),\
+              (__v8hi)( __W),\
+              (__mmask8)( __U));\
+})
+
+#define _mm_maskz_srai_epi16( __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrawi128_mask ((__v8hi)( __A),( __imm),\
+              (__v8hi)\
+              _mm_setzero_si128 (),\
+              (__mmask8)( __U));\
+})
+
+#define _mm256_mask_srai_epi16( __W, __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrawi256_mask ((__v16hi)( __A),( __imm),\
+              (__v16hi)( __W),\
+              (__mmask16)( __U));\
+})
+
+#define _mm256_maskz_srai_epi16( __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrawi256_mask ((__v16hi)( __A),( __imm),\
+              (__v16hi)\
+              _mm256_setzero_si256 (),\
+              (__mmask16)( __U));\
+})
+
 #undef __DEFAULT_FN_ATTRS
 
 #endif /* __AVX512VLBWINTRIN_H */
index 1f10109c60e5afed234351934e227d76148cddc3..a1fafe4ce50f1e5697d9b5e410f3b713b205a40e 100644 (file)
@@ -1203,4 +1203,41 @@ __m512i test_mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
   return _mm512_maskz_srav_epi16(__U, __A, __B); 
 }
 
+__m512i test_mm512_sra_epi16(__m512i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm512_sra_epi16
+  // CHECK: @llvm.x86.avx512.mask.psra.w.512
+  return _mm512_sra_epi16(__A, __B); 
+}
+
+__m512i test_mm512_mask_sra_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm512_mask_sra_epi16
+  // CHECK: @llvm.x86.avx512.mask.psra.w.512
+  return _mm512_mask_sra_epi16(__W, __U, __A, __B); 
+}
+
+__m512i test_mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm512_maskz_sra_epi16
+  // CHECK: @llvm.x86.avx512.mask.psra.w.512
+  return _mm512_maskz_sra_epi16(__U, __A, __B); 
+}
+
+__m512i test_mm512_srai_epi16(__m512i __A) {
+  // CHECK-LABEL: @test_mm512_srai_epi16
+  // CHECK: @llvm.x86.avx512.mask.psra.wi.512
+  return _mm512_srai_epi16(__A, 5); 
+}
+
+__m512i test_mm512_mask_srai_epi16(__m512i __W, __mmask32 __U, __m512i __A) {
+  // CHECK-LABEL: @test_mm512_mask_srai_epi16
+  // CHECK: @llvm.x86.avx512.mask.psra.wi.512
+  return _mm512_mask_srai_epi16(__W, __U, __A, 5); 
+}
+
+__m512i test_mm512_maskz_srai_epi16(__mmask32 __U, __m512i __A) {
+  // CHECK-LABEL: @test_mm512_maskz_srai_epi16
+  // CHECK: @llvm.x86.avx512.mask.psra.wi.512
+  return _mm512_maskz_srai_epi16(__U, __A, 5); 
+}
+
+