+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mattr=+cmov,cx16 -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
; RUN: llc -mattr=cx16 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
@sc64 = external global i64
-define void @atomic_maxmin_i6432() {
-; LINUX: atomic_maxmin_i6432
- %1 = atomicrmw max i64* @sc64, i64 5 acquire
-; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
-; LINUX: cmpl
-; LINUX: sbbl
-; LINUX: jne
-; LINUX: jne
-; LINUX: lock cmpxchg8b
-; LINUX: jne [[LABEL]]
- %2 = atomicrmw min i64* @sc64, i64 6 acquire
-; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
-; LINUX: cmpl
-; LINUX: sbbl
-; LINUX: jne
-; LINUX: jne
-; LINUX: lock cmpxchg8b
-; LINUX: jne [[LABEL]]
- %3 = atomicrmw umax i64* @sc64, i64 7 acquire
-; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
-; LINUX: cmpl
-; LINUX: sbbl
-; LINUX: jne
-; LINUX: jne
-; LINUX: lock cmpxchg8b
-; LINUX: jne [[LABEL]]
- %4 = atomicrmw umin i64* @sc64, i64 8 acquire
-; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
-; LINUX: cmpl
-; LINUX: sbbl
-; LINUX: jne
-; LINUX: jne
-; LINUX: lock cmpxchg8b
-; LINUX: jne [[LABEL]]
- ret void
+define i64 @atomic_max_i64() nounwind {
+; LINUX-LABEL: atomic_max_i64:
+; LINUX: # BB#0: # %entry
+; LINUX-NEXT: pushl %ebx
+; LINUX-NEXT: pushl %esi
+; LINUX-NEXT: movl sc64+4, %edx
+; LINUX-NEXT: movl sc64, %eax
+; LINUX-NEXT: movl $4, %esi
+; LINUX-NEXT: .p2align 4, 0x90
+; LINUX-NEXT: .LBB0_1: # %atomicrmw.start
+; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
+; LINUX-NEXT: xorl %ecx, %ecx
+; LINUX-NEXT: cmpl %eax, %esi
+; LINUX-NEXT: sbbl %edx, %ecx
+; LINUX-NEXT: setl %cl
+; LINUX-NEXT: andb $1, %cl
+; LINUX-NEXT: movl %eax, %ebx
+; LINUX-NEXT: jne .LBB0_3
+; LINUX-NEXT: # BB#2: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB0_1 Depth=1
+; LINUX-NEXT: movl $5, %ebx
+; LINUX-NEXT: .LBB0_3: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB0_1 Depth=1
+; LINUX-NEXT: testb %cl, %cl
+; LINUX-NEXT: movl %edx, %ecx
+; LINUX-NEXT: jne .LBB0_5
+; LINUX-NEXT: # BB#4: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB0_1 Depth=1
+; LINUX-NEXT: xorl %ecx, %ecx
+; LINUX-NEXT: .LBB0_5: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB0_1 Depth=1
+; LINUX-NEXT: lock cmpxchg8b sc64
+; LINUX-NEXT: jne .LBB0_1
+; LINUX-NEXT: # BB#6: # %atomicrmw.end
+; LINUX-NEXT: popl %esi
+; LINUX-NEXT: popl %ebx
+; LINUX-NEXT: retl
+;
+; PIC-LABEL: atomic_max_i64:
+; PIC: ## BB#0: ## %entry
+; PIC-NEXT: pushl %ebx
+; PIC-NEXT: pushl %edi
+; PIC-NEXT: pushl %esi
+; PIC-NEXT: calll L0$pb
+; PIC-NEXT: L0$pb:
+; PIC-NEXT: popl %eax
+; PIC-NEXT: movl L_sc64$non_lazy_ptr-L0$pb(%eax), %esi
+; PIC-NEXT: movl (%esi), %eax
+; PIC-NEXT: movl 4(%esi), %edx
+; PIC-NEXT: movl $4, %edi
+; PIC-NEXT: .p2align 4, 0x90
+; PIC-NEXT: LBB0_1: ## %atomicrmw.start
+; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
+; PIC-NEXT: xorl %ecx, %ecx
+; PIC-NEXT: cmpl %eax, %edi
+; PIC-NEXT: sbbl %edx, %ecx
+; PIC-NEXT: setl %cl
+; PIC-NEXT: andb $1, %cl
+; PIC-NEXT: movl %eax, %ebx
+; PIC-NEXT: jne LBB0_3
+; PIC-NEXT: ## BB#2: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB0_1 Depth=1
+; PIC-NEXT: movl $5, %ebx
+; PIC-NEXT: LBB0_3: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB0_1 Depth=1
+; PIC-NEXT: testb %cl, %cl
+; PIC-NEXT: movl %edx, %ecx
+; PIC-NEXT: jne LBB0_5
+; PIC-NEXT: ## BB#4: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB0_1 Depth=1
+; PIC-NEXT: xorl %ecx, %ecx
+; PIC-NEXT: LBB0_5: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB0_1 Depth=1
+; PIC-NEXT: lock cmpxchg8b (%esi)
+; PIC-NEXT: jne LBB0_1
+; PIC-NEXT: ## BB#6: ## %atomicrmw.end
+; PIC-NEXT: popl %esi
+; PIC-NEXT: popl %edi
+; PIC-NEXT: popl %ebx
+; PIC-NEXT: retl
+; PIC-NEXT: ## -- End function
+entry:
+ %max = atomicrmw max i64* @sc64, i64 5 acquire
+ ret i64 %max
+}
+
+define i64 @atomic_min_i64() nounwind {
+; LINUX-LABEL: atomic_min_i64:
+; LINUX: # BB#0: # %entry
+; LINUX-NEXT: pushl %ebx
+; LINUX-NEXT: movl sc64+4, %edx
+; LINUX-NEXT: movl sc64, %eax
+; LINUX-NEXT: .p2align 4, 0x90
+; LINUX-NEXT: .LBB1_1: # %atomicrmw.start
+; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
+; LINUX-NEXT: cmpl $7, %eax
+; LINUX-NEXT: movl %edx, %ecx
+; LINUX-NEXT: sbbl $0, %ecx
+; LINUX-NEXT: setl %cl
+; LINUX-NEXT: andb $1, %cl
+; LINUX-NEXT: movl %eax, %ebx
+; LINUX-NEXT: jne .LBB1_3
+; LINUX-NEXT: # BB#2: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB1_1 Depth=1
+; LINUX-NEXT: movl $6, %ebx
+; LINUX-NEXT: .LBB1_3: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB1_1 Depth=1
+; LINUX-NEXT: testb %cl, %cl
+; LINUX-NEXT: movl %edx, %ecx
+; LINUX-NEXT: jne .LBB1_5
+; LINUX-NEXT: # BB#4: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB1_1 Depth=1
+; LINUX-NEXT: xorl %ecx, %ecx
+; LINUX-NEXT: .LBB1_5: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB1_1 Depth=1
+; LINUX-NEXT: lock cmpxchg8b sc64
+; LINUX-NEXT: jne .LBB1_1
+; LINUX-NEXT: # BB#6: # %atomicrmw.end
+; LINUX-NEXT: popl %ebx
+; LINUX-NEXT: retl
+;
+; PIC-LABEL: atomic_min_i64:
+; PIC: ## BB#0: ## %entry
+; PIC-NEXT: pushl %ebx
+; PIC-NEXT: pushl %esi
+; PIC-NEXT: calll L1$pb
+; PIC-NEXT: L1$pb:
+; PIC-NEXT: popl %eax
+; PIC-NEXT: movl L_sc64$non_lazy_ptr-L1$pb(%eax), %esi
+; PIC-NEXT: movl (%esi), %eax
+; PIC-NEXT: movl 4(%esi), %edx
+; PIC-NEXT: .p2align 4, 0x90
+; PIC-NEXT: LBB1_1: ## %atomicrmw.start
+; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
+; PIC-NEXT: cmpl $7, %eax
+; PIC-NEXT: movl %edx, %ecx
+; PIC-NEXT: sbbl $0, %ecx
+; PIC-NEXT: setl %cl
+; PIC-NEXT: andb $1, %cl
+; PIC-NEXT: movl %eax, %ebx
+; PIC-NEXT: jne LBB1_3
+; PIC-NEXT: ## BB#2: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB1_1 Depth=1
+; PIC-NEXT: movl $6, %ebx
+; PIC-NEXT: LBB1_3: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB1_1 Depth=1
+; PIC-NEXT: testb %cl, %cl
+; PIC-NEXT: movl %edx, %ecx
+; PIC-NEXT: jne LBB1_5
+; PIC-NEXT: ## BB#4: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB1_1 Depth=1
+; PIC-NEXT: xorl %ecx, %ecx
+; PIC-NEXT: LBB1_5: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB1_1 Depth=1
+; PIC-NEXT: lock cmpxchg8b (%esi)
+; PIC-NEXT: jne LBB1_1
+; PIC-NEXT: ## BB#6: ## %atomicrmw.end
+; PIC-NEXT: popl %esi
+; PIC-NEXT: popl %ebx
+; PIC-NEXT: retl
+; PIC-NEXT: ## -- End function
+entry:
+ %min = atomicrmw min i64* @sc64, i64 6 acquire
+ ret i64 %min
+}
+
+define i64 @atomic_umax_i64() nounwind {
+; LINUX-LABEL: atomic_umax_i64:
+; LINUX: # BB#0: # %entry
+; LINUX-NEXT: pushl %ebx
+; LINUX-NEXT: pushl %esi
+; LINUX-NEXT: movl sc64+4, %edx
+; LINUX-NEXT: movl sc64, %eax
+; LINUX-NEXT: movl $7, %esi
+; LINUX-NEXT: .p2align 4, 0x90
+; LINUX-NEXT: .LBB2_1: # %atomicrmw.start
+; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
+; LINUX-NEXT: xorl %ecx, %ecx
+; LINUX-NEXT: cmpl %eax, %esi
+; LINUX-NEXT: sbbl %edx, %ecx
+; LINUX-NEXT: setb %cl
+; LINUX-NEXT: andb $1, %cl
+; LINUX-NEXT: movl %eax, %ebx
+; LINUX-NEXT: jne .LBB2_3
+; LINUX-NEXT: # BB#2: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB2_1 Depth=1
+; LINUX-NEXT: movl $7, %ebx
+; LINUX-NEXT: .LBB2_3: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB2_1 Depth=1
+; LINUX-NEXT: testb %cl, %cl
+; LINUX-NEXT: movl %edx, %ecx
+; LINUX-NEXT: jne .LBB2_5
+; LINUX-NEXT: # BB#4: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB2_1 Depth=1
+; LINUX-NEXT: xorl %ecx, %ecx
+; LINUX-NEXT: .LBB2_5: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB2_1 Depth=1
+; LINUX-NEXT: lock cmpxchg8b sc64
+; LINUX-NEXT: jne .LBB2_1
+; LINUX-NEXT: # BB#6: # %atomicrmw.end
+; LINUX-NEXT: popl %esi
+; LINUX-NEXT: popl %ebx
+; LINUX-NEXT: retl
+;
+; PIC-LABEL: atomic_umax_i64:
+; PIC: ## BB#0: ## %entry
+; PIC-NEXT: pushl %ebx
+; PIC-NEXT: pushl %edi
+; PIC-NEXT: pushl %esi
+; PIC-NEXT: calll L2$pb
+; PIC-NEXT: L2$pb:
+; PIC-NEXT: popl %eax
+; PIC-NEXT: movl L_sc64$non_lazy_ptr-L2$pb(%eax), %esi
+; PIC-NEXT: movl (%esi), %eax
+; PIC-NEXT: movl 4(%esi), %edx
+; PIC-NEXT: movl $7, %edi
+; PIC-NEXT: .p2align 4, 0x90
+; PIC-NEXT: LBB2_1: ## %atomicrmw.start
+; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
+; PIC-NEXT: xorl %ecx, %ecx
+; PIC-NEXT: cmpl %eax, %edi
+; PIC-NEXT: sbbl %edx, %ecx
+; PIC-NEXT: setb %cl
+; PIC-NEXT: andb $1, %cl
+; PIC-NEXT: movl %eax, %ebx
+; PIC-NEXT: jne LBB2_3
+; PIC-NEXT: ## BB#2: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB2_1 Depth=1
+; PIC-NEXT: movl $7, %ebx
+; PIC-NEXT: LBB2_3: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB2_1 Depth=1
+; PIC-NEXT: testb %cl, %cl
+; PIC-NEXT: movl %edx, %ecx
+; PIC-NEXT: jne LBB2_5
+; PIC-NEXT: ## BB#4: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB2_1 Depth=1
+; PIC-NEXT: xorl %ecx, %ecx
+; PIC-NEXT: LBB2_5: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB2_1 Depth=1
+; PIC-NEXT: lock cmpxchg8b (%esi)
+; PIC-NEXT: jne LBB2_1
+; PIC-NEXT: ## BB#6: ## %atomicrmw.end
+; PIC-NEXT: popl %esi
+; PIC-NEXT: popl %edi
+; PIC-NEXT: popl %ebx
+; PIC-NEXT: retl
+; PIC-NEXT: ## -- End function
+entry:
+ %umax = atomicrmw umax i64* @sc64, i64 7 acquire
+ ret i64 %umax
+}
+
+define i64 @atomic_umin_i64() nounwind {
+; LINUX-LABEL: atomic_umin_i64:
+; LINUX: # BB#0: # %entry
+; LINUX-NEXT: pushl %ebx
+; LINUX-NEXT: movl sc64+4, %edx
+; LINUX-NEXT: movl sc64, %eax
+; LINUX-NEXT: .p2align 4, 0x90
+; LINUX-NEXT: .LBB3_1: # %atomicrmw.start
+; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
+; LINUX-NEXT: cmpl $9, %eax
+; LINUX-NEXT: movl %edx, %ecx
+; LINUX-NEXT: sbbl $0, %ecx
+; LINUX-NEXT: setb %cl
+; LINUX-NEXT: andb $1, %cl
+; LINUX-NEXT: movl %eax, %ebx
+; LINUX-NEXT: jne .LBB3_3
+; LINUX-NEXT: # BB#2: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB3_1 Depth=1
+; LINUX-NEXT: movl $8, %ebx
+; LINUX-NEXT: .LBB3_3: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB3_1 Depth=1
+; LINUX-NEXT: testb %cl, %cl
+; LINUX-NEXT: movl %edx, %ecx
+; LINUX-NEXT: jne .LBB3_5
+; LINUX-NEXT: # BB#4: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB3_1 Depth=1
+; LINUX-NEXT: xorl %ecx, %ecx
+; LINUX-NEXT: .LBB3_5: # %atomicrmw.start
+; LINUX-NEXT: # in Loop: Header=BB3_1 Depth=1
+; LINUX-NEXT: lock cmpxchg8b sc64
+; LINUX-NEXT: jne .LBB3_1
+; LINUX-NEXT: # BB#6: # %atomicrmw.end
+; LINUX-NEXT: popl %ebx
+; LINUX-NEXT: retl
+;
+; PIC-LABEL: atomic_umin_i64:
+; PIC: ## BB#0: ## %entry
+; PIC-NEXT: pushl %ebx
+; PIC-NEXT: pushl %esi
+; PIC-NEXT: calll L3$pb
+; PIC-NEXT: L3$pb:
+; PIC-NEXT: popl %eax
+; PIC-NEXT: movl L_sc64$non_lazy_ptr-L3$pb(%eax), %esi
+; PIC-NEXT: movl (%esi), %eax
+; PIC-NEXT: movl 4(%esi), %edx
+; PIC-NEXT: .p2align 4, 0x90
+; PIC-NEXT: LBB3_1: ## %atomicrmw.start
+; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
+; PIC-NEXT: cmpl $9, %eax
+; PIC-NEXT: movl %edx, %ecx
+; PIC-NEXT: sbbl $0, %ecx
+; PIC-NEXT: setb %cl
+; PIC-NEXT: andb $1, %cl
+; PIC-NEXT: movl %eax, %ebx
+; PIC-NEXT: jne LBB3_3
+; PIC-NEXT: ## BB#2: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB3_1 Depth=1
+; PIC-NEXT: movl $8, %ebx
+; PIC-NEXT: LBB3_3: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB3_1 Depth=1
+; PIC-NEXT: testb %cl, %cl
+; PIC-NEXT: movl %edx, %ecx
+; PIC-NEXT: jne LBB3_5
+; PIC-NEXT: ## BB#4: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB3_1 Depth=1
+; PIC-NEXT: xorl %ecx, %ecx
+; PIC-NEXT: LBB3_5: ## %atomicrmw.start
+; PIC-NEXT: ## in Loop: Header=BB3_1 Depth=1
+; PIC-NEXT: lock cmpxchg8b (%esi)
+; PIC-NEXT: jne LBB3_1
+; PIC-NEXT: ## BB#6: ## %atomicrmw.end
+; PIC-NEXT: popl %esi
+; PIC-NEXT: popl %ebx
+; PIC-NEXT: retl
+; PIC-NEXT: ## -- End function
+entry:
+ %umin = atomicrmw umin i64* @sc64, i64 8 acquire
+ ret i64 %umin
}
-; rdar://12453106
@id = internal global i64 0, align 8
define void @tf_bug(i8* %ptr) nounwind {
+; LINUX-LABEL: tf_bug:
+; LINUX: # BB#0: # %entry
+; LINUX-NEXT: pushl %ebx
+; LINUX-NEXT: pushl %esi
+; LINUX-NEXT: movl {{[0-9]+}}(%esp), %esi
+; LINUX-NEXT: movl id+4, %edx
+; LINUX-NEXT: movl id, %eax
+; LINUX-NEXT: .p2align 4, 0x90
+; LINUX-NEXT: .LBB4_1: # %atomicrmw.start
+; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
+; LINUX-NEXT: movl %eax, %ebx
+; LINUX-NEXT: addl $1, %ebx
+; LINUX-NEXT: movl %edx, %ecx
+; LINUX-NEXT: adcl $0, %ecx
+; LINUX-NEXT: lock cmpxchg8b id
+; LINUX-NEXT: jne .LBB4_1
+; LINUX-NEXT: # BB#2: # %atomicrmw.end
+; LINUX-NEXT: addl $1, %eax
+; LINUX-NEXT: adcl $0, %edx
+; LINUX-NEXT: movl %eax, (%esi)
+; LINUX-NEXT: movl %edx, 4(%esi)
+; LINUX-NEXT: popl %esi
+; LINUX-NEXT: popl %ebx
+; LINUX-NEXT: retl
+;
; PIC-LABEL: tf_bug:
-; PIC-DAG: movl _id-L1$pb(
-; PIC-DAG: movl (_id-L1$pb)+4(
+; PIC: ## BB#0: ## %entry
+; PIC-NEXT: pushl %ebx
+; PIC-NEXT: pushl %edi
+; PIC-NEXT: pushl %esi
+; PIC-NEXT: calll L4$pb
+; PIC-NEXT: L4$pb:
+; PIC-NEXT: popl %edi
+; PIC-NEXT: movl {{[0-9]+}}(%esp), %esi
+; PIC-NEXT: movl (_id-L4$pb)+4(%edi), %edx
+; PIC-NEXT: movl _id-L4$pb(%edi), %eax
+; PIC-NEXT: .p2align 4, 0x90
+; PIC-NEXT: LBB4_1: ## %atomicrmw.start
+; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
+; PIC-NEXT: movl %eax, %ebx
+; PIC-NEXT: addl $1, %ebx
+; PIC-NEXT: movl %edx, %ecx
+; PIC-NEXT: adcl $0, %ecx
+; PIC-NEXT: lock cmpxchg8b _id-L4$pb(%edi)
+; PIC-NEXT: jne LBB4_1
+; PIC-NEXT: ## BB#2: ## %atomicrmw.end
+; PIC-NEXT: addl $1, %eax
+; PIC-NEXT: adcl $0, %edx
+; PIC-NEXT: movl %eax, (%esi)
+; PIC-NEXT: movl %edx, 4(%esi)
+; PIC-NEXT: popl %esi
+; PIC-NEXT: popl %edi
+; PIC-NEXT: popl %ebx
+; PIC-NEXT: retl
+; PIC-NEXT: ## -- End function
+; PIC-NEXT: .zerofill __DATA,__bss,_id,8,3 ## @id
+entry:
%tmp1 = atomicrmw add i64* @id, i64 1 seq_cst
%tmp2 = add i64 %tmp1, 1
%tmp3 = bitcast i8* %ptr to i64*
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -show-mc-encoding | FileCheck %s
+@d = global i8 0, align 1
+
define i32 @test1(i32 %X, i32* %y) nounwind {
- %tmp = load i32, i32* %y ; <i32> [#uses=1]
- %tmp.upgrd.1 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1]
- br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true
+; CHECK-LABEL: test1:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: cmpl $0, (%rsi) ## encoding: [0x83,0x3e,0x00]
+; CHECK-NEXT: je LBB0_2 ## encoding: [0x74,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: LBB0_2-1, kind: FK_PCRel_1
+; CHECK-NEXT: ## BB#1: ## %cond_true
+; CHECK-NEXT: movl $1, %eax ## encoding: [0xb8,0x01,0x00,0x00,0x00]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: LBB0_2: ## %ReturnBlock
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
+ %tmp = load i32, i32* %y
+ %tmp.upgrd.1 = icmp eq i32 %tmp, 0
+ br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true
-cond_true: ; preds = %0
- ret i32 1
+cond_true:
+ ret i32 1
-ReturnBlock: ; preds = %0
- ret i32 0
-; CHECK-LABEL: test1:
-; CHECK: cmpl $0, (%rsi)
+ReturnBlock:
+ ret i32 0
}
define i32 @test2(i32 %X, i32* %y) nounwind {
- %tmp = load i32, i32* %y ; <i32> [#uses=1]
- %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1]
- %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
- br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
+; CHECK-LABEL: test2:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: testl $536870911, (%rsi) ## encoding: [0xf7,0x06,0xff,0xff,0xff,0x1f]
+; CHECK-NEXT: ## imm = 0x1FFFFFFF
+; CHECK-NEXT: je LBB1_2 ## encoding: [0x74,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: LBB1_2-1, kind: FK_PCRel_1
+; CHECK-NEXT: ## BB#1: ## %cond_true
+; CHECK-NEXT: movl $1, %eax ## encoding: [0xb8,0x01,0x00,0x00,0x00]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: LBB1_2: ## %ReturnBlock
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
+ %tmp = load i32, i32* %y
+ %tmp1 = shl i32 %tmp, 3
+ %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0
+ br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
-cond_true: ; preds = %0
- ret i32 1
+cond_true:
+ ret i32 1
-ReturnBlock: ; preds = %0
- ret i32 0
-; CHECK-LABEL: test2:
-; CHECK: testl $536870911, (%rsi)
+ReturnBlock:
+ ret i32 0
}
define i8 @test2b(i8 %X, i8* %y) nounwind {
- %tmp = load i8, i8* %y ; <i8> [#uses=1]
- %tmp1 = shl i8 %tmp, 3 ; <i8> [#uses=1]
- %tmp1.upgrd.2 = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1]
- br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
+; CHECK-LABEL: test2b:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: testb $31, (%rsi) ## encoding: [0xf6,0x06,0x1f]
+; CHECK-NEXT: je LBB2_2 ## encoding: [0x74,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: LBB2_2-1, kind: FK_PCRel_1
+; CHECK-NEXT: ## BB#1: ## %cond_true
+; CHECK-NEXT: movb $1, %al ## encoding: [0xb0,0x01]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: LBB2_2: ## %ReturnBlock
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
+ %tmp = load i8, i8* %y
+ %tmp1 = shl i8 %tmp, 3
+ %tmp1.upgrd.2 = icmp eq i8 %tmp1, 0
+ br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
-cond_true: ; preds = %0
- ret i8 1
+cond_true:
+ ret i8 1
-ReturnBlock: ; preds = %0
- ret i8 0
-; CHECK-LABEL: test2b:
-; CHECK: testb $31, (%rsi)
+ReturnBlock:
+ ret i8 0
}
define i64 @test3(i64 %x) nounwind {
+; CHECK-LABEL: test3:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: testq %rdi, %rdi ## encoding: [0x48,0x85,0xff]
+; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
%t = icmp eq i64 %x, 0
%r = zext i1 %t to i64
ret i64 %r
-; CHECK-LABEL: test3:
-; CHECK: xorl %eax, %eax
-; CHECK: testq %rdi, %rdi
-; CHECK: sete %al
-; CHECK: ret
}
define i64 @test4(i64 %x) nounwind {
+; CHECK-LABEL: test4:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: testq %rdi, %rdi ## encoding: [0x48,0x85,0xff]
+; CHECK-NEXT: setle %al ## encoding: [0x0f,0x9e,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
%t = icmp slt i64 %x, 1
%r = zext i1 %t to i64
ret i64 %r
-; CHECK-LABEL: test4:
-; CHECK: xorl %eax, %eax
-; CHECK: testq %rdi, %rdi
-; CHECK: setle %al
-; CHECK: ret
}
+define i32 @test5(double %A) nounwind {
+; CHECK-LABEL: test5:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: ucomisd {{.*}}(%rip), %xmm0 ## encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A]
+; CHECK-NEXT: ## fixup A - offset: 4, value: LCPI5_0-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: ja LBB5_3 ## encoding: [0x77,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: LBB5_3-1, kind: FK_PCRel_1
+; CHECK-NEXT: ## BB#1: ## %entry
+; CHECK-NEXT: ucomisd {{.*}}(%rip), %xmm0 ## encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A]
+; CHECK-NEXT: ## fixup A - offset: 4, value: LCPI5_1-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: jb LBB5_3 ## encoding: [0x72,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: LBB5_3-1, kind: FK_PCRel_1
+; CHECK-NEXT: ## BB#2: ## %bb12
+; CHECK-NEXT: movl $32, %eax ## encoding: [0xb8,0x20,0x00,0x00,0x00]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: LBB5_3: ## %bb8
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: jmp _foo ## TAILCALL
+; CHECK-NEXT: ## encoding: [0xeb,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: _foo-1, kind: FK_PCRel_1
+; CHECK-NEXT: ## -- End function
+entry:
+ %tmp2 = fcmp ogt double %A, 1.500000e+02
+ %tmp5 = fcmp ult double %A, 7.500000e+01
+ %bothcond = or i1 %tmp2, %tmp5
+ br i1 %bothcond, label %bb8, label %bb12
-define i32 @test5(double %A) nounwind {
- entry:
- %tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1]
- %tmp5 = fcmp ult double %A, 7.500000e+01; <i1> [#uses=1]
- %bothcond = or i1 %tmp2, %tmp5; <i1> [#uses=1]
- br i1 %bothcond, label %bb8, label %bb12
-
- bb8:; preds = %entry
- %tmp9 = tail call i32 (...) @foo( ) nounwind ; <i32> [#uses=1]
- ret i32 %tmp9
+bb8:
+ %tmp9 = tail call i32 (...) @foo() nounwind
+ ret i32 %tmp9
- bb12:; preds = %entry
- ret i32 32
-; CHECK-LABEL: test5:
-; CHECK: ucomisd LCPI5_0(%rip), %xmm0
-; CHECK: ucomisd LCPI5_1(%rip), %xmm0
+bb12:
+ ret i32 32
}
declare i32 @foo(...)
define i32 @test6() nounwind align 2 {
- %A = alloca {i64, i64}, align 8
- %B = getelementptr inbounds {i64, i64}, {i64, i64}* %A, i64 0, i32 1
+; CHECK-LABEL: test6:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: cmpq $0, -{{[0-9]+}}(%rsp) ## encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
+; CHECK-NEXT: je LBB6_1 ## encoding: [0x74,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: LBB6_1-1, kind: FK_PCRel_1
+; CHECK-NEXT: ## BB#2: ## %F
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: LBB6_1: ## %T
+; CHECK-NEXT: movl $1, %eax ## encoding: [0xb8,0x01,0x00,0x00,0x00]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
+ %A = alloca { i64, i64 }, align 8
+ %B = getelementptr inbounds { i64, i64 }, { i64, i64 }* %A, i64 0, i32 1
%C = load i64, i64* %B
%D = icmp eq i64 %C, 0
br i1 %D, label %T, label %F
+
T:
ret i32 1
-
+
F:
ret i32 0
-; CHECK-LABEL: test6:
-; CHECK: cmpq $0, -8(%rsp)
-; CHECK: encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
}
-; rdar://11866926
define i32 @test7(i64 %res) nounwind {
-entry:
; CHECK-LABEL: test7:
-; CHECK-NOT: movabsq
-; CHECK: shrq $32, %rdi
-; CHECK: sete
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: shrq $32, %rdi ## encoding: [0x48,0xc1,0xef,0x20]
+; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
%lnot = icmp ult i64 %res, 4294967296
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
define i32 @test8(i64 %res) nounwind {
-entry:
; CHECK-LABEL: test8:
-; CHECK-NOT: movabsq
-; CHECK: shrq $32, %rdi
-; CHECK: cmpq $3, %rdi
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: shrq $32, %rdi ## encoding: [0x48,0xc1,0xef,0x20]
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: cmpq $3, %rdi ## encoding: [0x48,0x83,0xff,0x03]
+; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
%lnot = icmp ult i64 %res, 12884901888
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
define i32 @test9(i64 %res) nounwind {
-entry:
; CHECK-LABEL: test9:
-; CHECK-NOT: movabsq
-; CHECK: shrq $33, %rdi
-; CHECK: sete
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: shrq $33, %rdi ## encoding: [0x48,0xc1,0xef,0x21]
+; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
%lnot = icmp ult i64 %res, 8589934592
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
define i32 @test10(i64 %res) nounwind {
-entry:
; CHECK-LABEL: test10:
-; CHECK-NOT: movabsq
-; CHECK: shrq $32, %rdi
-; CHECK: setne
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: shrq $32, %rdi ## encoding: [0x48,0xc1,0xef,0x20]
+; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
%lnot = icmp uge i64 %res, 4294967296
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
}
-; rdar://9758774
define i32 @test11(i64 %l) nounwind {
-entry:
; CHECK-LABEL: test11:
-; CHECK-NOT: movabsq
-; CHECK-NOT: andq
-; CHECK: shrq $47, %rdi
-; CHECK: cmpq $1, %rdi
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: shrq $47, %rdi ## encoding: [0x48,0xc1,0xef,0x2f]
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: cmpq $1, %rdi ## encoding: [0x48,0x83,0xff,0x01]
+; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: ## -- End function
+entry:
%shr.mask = and i64 %l, -140737488355328
%cmp = icmp eq i64 %shr.mask, 140737488355328
%conv = zext i1 %cmp to i32
ret i32 %conv
}
-define i32 @test12() uwtable ssp {
+define i32 @test12() ssp uwtable {
; CHECK-LABEL: test12:
-; CHECK: testb
- %1 = call zeroext i1 @test12b()
- br i1 %1, label %2, label %3
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: pushq %rax ## encoding: [0x50]
+; CHECK-NEXT: Lcfi0:
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: callq _test12b ## encoding: [0xe8,A,A,A,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: _test12b-4, kind: FK_PCRel_4
+; CHECK-NEXT: testb %al, %al ## encoding: [0x84,0xc0]
+; CHECK-NEXT: je LBB12_2 ## encoding: [0x74,A]
+; CHECK-NEXT: ## fixup A - offset: 1, value: LBB12_2-1, kind: FK_PCRel_1
+; CHECK-NEXT: ## BB#1: ## %T
+; CHECK-NEXT: movl $1, %eax ## encoding: [0xb8,0x01,0x00,0x00,0x00]
+; CHECK-NEXT: popq %rcx ## encoding: [0x59]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+; CHECK-NEXT: LBB12_2: ## %F
+; CHECK-NEXT: movl $2, %eax ## encoding: [0xb8,0x02,0x00,0x00,0x00]
+; CHECK-NEXT: popq %rcx ## encoding: [0x59]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %tmp1 = call zeroext i1 @test12b()
+ br i1 %tmp1, label %T, label %F
-; <label>:2 ; preds = %0
+T:
ret i32 1
-; <label>:3 ; preds = %0
+F:
ret i32 2
}
declare zeroext i1 @test12b()
define i32 @test13(i32 %mask, i32 %base, i32 %intra) {
+; CHECK-LABEL: test13:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: testb $8, %dil ## encoding: [0x40,0xf6,0xc7,0x08]
+; CHECK-NEXT: cmovnel %edx, %esi ## encoding: [0x0f,0x45,0xf2]
+; CHECK-NEXT: movl %esi, %eax ## encoding: [0x89,0xf0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
%and = and i32 %mask, 8
%tobool = icmp ne i32 %and, 0
%cond = select i1 %tobool, i32 %intra, i32 %base
ret i32 %cond
-; CHECK-LABEL: test13:
-; CHECK: testb $8, %dil
-; CHECK: cmovnel
}
-define i32 @test14(i32 %mask, i32 %base, i32 %intra) #0 {
+define i32 @test14(i32 %mask, i32 %base, i32 %intra) {
+; CHECK-LABEL: test14:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: shrl $7, %edi ## encoding: [0xc1,0xef,0x07]
+; CHECK-NEXT: cmovnsl %edx, %esi ## encoding: [0x0f,0x49,0xf2]
+; CHECK-NEXT: movl %esi, %eax ## encoding: [0x89,0xf0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
%s = lshr i32 %mask, 7
%tobool = icmp sgt i32 %s, -1
%cond = select i1 %tobool, i32 %intra, i32 %base
ret i32 %cond
-; CHECK-LABEL: test14:
-; CHECK: shrl $7, %edi
-; CHECK-NEXT: cmovnsl %edx, %esi
}
; PR19964
define zeroext i1 @test15(i32 %bf.load, i32 %n) {
+; CHECK-LABEL: test15:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: shrl $16, %edi ## encoding: [0xc1,0xef,0x10]
+; CHECK-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1]
+; CHECK-NEXT: cmpl %esi, %edi ## encoding: [0x39,0xf7]
+; CHECK-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
+; CHECK-NEXT: orb %cl, %al ## encoding: [0x08,0xc8]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
%bf.lshr = lshr i32 %bf.load, 16
%cmp2 = icmp eq i32 %bf.lshr, 0
%cmp5 = icmp uge i32 %bf.lshr, %n
%.cmp5 = or i1 %cmp2, %cmp5
ret i1 %.cmp5
-; CHECK-LABEL: test15:
-; CHECK: shrl $16, %edi
-; CHECK: cmpl %esi, %edi
}
define i8 @test16(i16 signext %L) {
- %lshr = lshr i16 %L, 15
+; CHECK-LABEL: test16:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: testw %di, %di ## encoding: [0x66,0x85,0xff]
+; CHECK-NEXT: setns %al ## encoding: [0x0f,0x99,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %lshr = lshr i16 %L, 15
%trunc = trunc i16 %lshr to i8
- %not = xor i8 %trunc, 1
+ %not = xor i8 %trunc, 1
ret i8 %not
-; CHECK-LABEL: test16:
-; CHECK: testw %di, %di
-; CHECK: setns %al
}
define i8 @test17(i32 %L) {
- %lshr = lshr i32 %L, 31
+; CHECK-LABEL: test17:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: testl %edi, %edi ## encoding: [0x85,0xff]
+; CHECK-NEXT: setns %al ## encoding: [0x0f,0x99,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %lshr = lshr i32 %L, 31
%trunc = trunc i32 %lshr to i8
- %not = xor i8 %trunc, 1
+ %not = xor i8 %trunc, 1
ret i8 %not
-; CHECK-LABEL: test17:
-; CHECK: testl %edi, %edi
-; CHECK: setns %al
}
define i8 @test18(i64 %L) {
- %lshr = lshr i64 %L, 63
+; CHECK-LABEL: test18:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: testq %rdi, %rdi ## encoding: [0x48,0x85,0xff]
+; CHECK-NEXT: setns %al ## encoding: [0x0f,0x99,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %lshr = lshr i64 %L, 63
%trunc = trunc i64 %lshr to i8
- %not = xor i8 %trunc, 1
+ %not = xor i8 %trunc, 1
ret i8 %not
-; CHECK-LABEL: test18:
-; CHECK: testq %rdi, %rdi
-; CHECK: setns %al
}
define zeroext i1 @test19(i32 %L) {
- %lshr = lshr i32 %L, 31
+; CHECK-LABEL: test19:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: testl %edi, %edi ## encoding: [0x85,0xff]
+; CHECK-NEXT: setns %al ## encoding: [0x0f,0x99,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %lshr = lshr i32 %L, 31
%trunc = trunc i32 %lshr to i1
- %not = xor i1 %trunc, 1
+ %not = xor i1 %trunc, true
ret i1 %not
-; CHECK-LABEL: test19:
-; CHECK: testl %edi, %edi
-; CHECK: setns %al
}
-@d = global i8 0, align 1
-
; This test failed due to incorrect handling of "shift + icmp" sequence
define void @test20(i32 %bf.load, i8 %x1, i8* %b_addr) {
+; CHECK-LABEL: test20:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: andl $16777215, %edi ## encoding: [0x81,0xe7,0xff,0xff,0xff,0x00]
+; CHECK-NEXT: ## imm = 0xFFFFFF
+; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
+; CHECK-NEXT: movzbl %sil, %ecx ## encoding: [0x40,0x0f,0xb6,0xce]
+; CHECK-NEXT: addl %eax, %ecx ## encoding: [0x01,0xc1]
+; CHECK-NEXT: setne (%rdx) ## encoding: [0x0f,0x95,0x02]
+; CHECK-NEXT: testl %edi, %edi ## encoding: [0x85,0xff]
+; CHECK-NEXT: setne {{.*}}(%rip) ## encoding: [0x0f,0x95,0x05,A,A,A,A]
+; CHECK-NEXT: ## fixup A - offset: 3, value: _d-4, kind: reloc_riprel_4byte
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
%bf.shl = shl i32 %bf.load, 8
%bf.ashr = ashr exact i32 %bf.shl, 8
%tobool4 = icmp ne i32 %bf.ashr, 0
store i8 %frombool15, i8* @d, align 1
ret void
-; CHECK-LABEL: test20
-; CHECK: andl
-; CHECK: setne
-; CHECK: addl
-; CHECK: setne
-; CHECK: testl
-; CHECK: setne
}
define i32 @test21(i64 %val) {
- %and = and i64 %val, -2199023255552 ; 0xFFFFFE0000000000
+; CHECK-LABEL: test21:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: shrq $41, %rdi ## encoding: [0x48,0xc1,0xef,0x29]
+; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %and = and i64 %val, -2199023255552
%cmp = icmp ne i64 %and, 0
%ret = zext i1 %cmp to i32
ret i32 %ret
-; CHECK-LABEL: test21
-; CHECK: shrq $41, %rdi
-; CHECK-NOT: test
-; CHECK: setne %al
-; CHECK: retq
}
; AND-to-SHR transformation is enabled for eq/ne condition codes only.
define i32 @test22(i64 %val) {
- %and = and i64 %val, -2199023255552 ; 0xFFFFFE0000000000
+; CHECK-LABEL: test22:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %and = and i64 %val, -2199023255552
%cmp = icmp ult i64 %and, 0
%ret = zext i1 %cmp to i32
ret i32 %ret
-; CHECK-LABEL: test22
-; CHECK-NOT: shrq $41
-; CHECK: retq
}
define i32 @test23(i64 %val) {
- %and = and i64 %val, -1048576 ; 0xFFFFFFFFFFF00000
+; CHECK-LABEL: test23:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: testq $-1048576, %rdi ## encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff]
+; CHECK-NEXT: ## imm = 0xFFF00000
+; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %and = and i64 %val, -1048576
%cmp = icmp ne i64 %and, 0
%ret = zext i1 %cmp to i32
ret i32 %ret
-; CHECK-LABEL: test23
-; CHECK: testq $-1048576, %rdi
-; CHECK: setne %al
-; CHECK: retq
}
define i32 @test24(i64 %val) {
- %and = and i64 %val, 281474976710655 ; 0x0000FFFFFFFFFFFF
+; CHECK-LABEL: test24:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
+; CHECK-NEXT: shlq $16, %rdi ## encoding: [0x48,0xc1,0xe7,0x10]
+; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
+; CHECK-NEXT: retq ## encoding: [0xc3]
+entry:
+ %and = and i64 %val, 281474976710655
%cmp = icmp ne i64 %and, 0
%ret = zext i1 %cmp to i32
ret i32 %ret
-; CHECK-LABEL: test24
-; CHECK: shlq $16, %rdi
-; CHECK-NOT: test
-; CHECK: setne %al
-; CHECK: retq
}
projects / llvm / commitdiff