[CGP] Disable Select instruction handling in optimizeMemoryInst. NFC

This patch disables the handling of selects in optimization
extensing scope of optimizeMemoryInst.

The optimization itself is disable by default.
The idea here is just to switch optimiztion level step by step.

Specifically, first optimization will be enabled only for Phi nodes,
then select instructions will be added.

In case someone will complain about perfromance it will be easier to
detect what part of optimizations is responsible for that.

Differential Revision: https://reviews.llvm.org/D36073

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317555 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/CodeGenPrepare.cpp b/lib/CodeGen/CodeGenPrepare.cpp
index 2a678291c42ce54d2408ecc5ed93ce1b79aa1af3..5b48f5f4d1e04599f877cf50086028a20ddaf2f9 100644 (file)
--- a/lib/CodeGen/CodeGenPrepare.cpp
+++ b/lib/CodeGen/CodeGenPrepare.cpp
@@ -199,7 +199,7 @@ AddrSinkNewPhis("addr-sink-new-phis", cl::Hidden, cl::init(false),
                 cl::desc("Allow creation of Phis in Address sinking."));
 
 static cl::opt<bool>
-AddrSinkNewSelects("addr-sink-new-select", cl::Hidden, cl::init(true),
+AddrSinkNewSelects("addr-sink-new-select", cl::Hidden, cl::init(false),
                    cl::desc("Allow creation of selects in Address sinking."));
 
 namespace {

diff --git a/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll b/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
index a9635eb1c70eff3d4f4f176cf752349bf1585a11..06a513543c45708fad04569f5675c6a132deb7e0 100644 (file)
--- a/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
+++ b/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -mtriple=thumbv7m -disable-complex-addr-modes=false < %s | FileCheck %s
+; RUN: opt -S -codegenprepare -mtriple=thumbv7m -disable-complex-addr-modes=false -addr-sink-new-select=true < %s | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
 

diff --git a/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll b/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
index 261c71a8b93d50a81994ca561976fa3a4296f62d..2bacbdd7f400e9ce8478bd41c961d90cb017f6f1 100644 (file)
--- a/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
+++ b/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
@@ -1,5 +1,5 @@
-; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=true %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-YES
-; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=false %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NO
+; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=true -addr-sink-new-select=true  %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-YES
+; RUN: opt -S -codegenprepare -disable-complex-addr-modes=false -addr-sink-new-phis=false -addr-sink-new-select=true %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NO
 target datalayout =
 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 target triple = "x86_64-unknown-linux-gnu"