TableGen: Allow signed immediates for instruction aliases

Patch by Daniel Cederman.

Reviewers: stoklund, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D27046

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287856 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 50615689d66167e0e7c026eb1a85b6aeaa53fb34..70cea1fb930eba2b150210be9b27d10262005add 100644 (file)
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -879,7 +879,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
           IAP.addCond(Op + ".isImm()");
 
           Cond = Op + ".getImm() == " +
-                 llvm::utostr(CGA.ResultOperands[i].getImm());
+                 llvm::itostr(CGA.ResultOperands[i].getImm());
           IAP.addCond(Cond);
           break;
         }