AMDGPU: Allow coldcc calls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312936 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 22ca429f1a6671bb8a8480dde36cb3a45007b693..5ace79de89ae7e8825137f024a804d73447a71d5 100644 (file)
--- a/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -851,6 +851,7 @@ CCAssignFn *AMDGPUCallLowering::CCAssignFnForCall(CallingConv::ID CC,
     return CC_AMDGPU;
   case CallingConv::C:
   case CallingConv::Fast:
+  case CallingConv::Cold:
     return CC_AMDGPU_Func;
   default:
     report_fatal_error("Unsupported calling convention.");
@@ -871,6 +872,7 @@ CCAssignFn *AMDGPUCallLowering::CCAssignFnForReturn(CallingConv::ID CC,
     return RetCC_SI_Shader;
   case CallingConv::C:
   case CallingConv::Fast:
+  case CallingConv::Cold:
     return RetCC_AMDGPU_Func;
   default:
     report_fatal_error("Unsupported calling convention.");

diff --git a/test/CodeGen/AMDGPU/calling-conventions.ll b/test/CodeGen/AMDGPU/calling-conventions.ll
index 677147b6f4e53f450733c85e52654181e672c3e9..9bf94a1f2da06b4a95c4e87e8beab5fb3c91f0d0 100644 (file)
--- a/test/CodeGen/AMDGPU/calling-conventions.ll
+++ b/test/CodeGen/AMDGPU/calling-conventions.ll
@@ -43,3 +43,37 @@ define amdgpu_ps half @ps_ret_cc_inreg_f16(half inreg %arg0) {
   %add = fadd half %arg0, 1.0
   ret half %add
 }
+
+; GCN-LABEL: {{^}}fastcc:
+; GCN: v_add_f32_e32 v0, 4.0, v0
+define fastcc float @fastcc(float %arg0) #0 {
+  %add = fadd float %arg0, 4.0
+  ret float %add
+}
+
+; GCN-LABEL: {{^}}coldcc:
+; GCN: v_add_f32_e32 v0, 4.0, v0
+define coldcc float @coldcc(float %arg0) #0 {
+ %add = fadd float %arg0, 4.0
+ ret float %add
+}
+
+; GCN-LABEL: {{^}}call_coldcc:
+; GCN: v_mov_b32_e32 v0, 1.0
+; GCN: s_swappc_b64
+define amdgpu_kernel void @call_coldcc() #0 {
+  %val = call float @coldcc(float 1.0)
+  store float %val, float addrspace(1)* undef
+  ret void
+}
+
+; GCN-LABEL: {{^}}call_fastcc:
+; GCN: v_mov_b32_e32 v0, 1.0
+; GCN: s_swappc_b64
+define amdgpu_kernel void @call_fastcc() #0 {
+  %val = call float @fastcc(float 1.0)
+  store float %val, float addrspace(1)* undef
+  ret void
+}
+
+attributes #0 = { nounwind noinline }
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