Check the specific target to figure out if a constraint is a valid

register constraint. Note that we're not checking if the register itself
is valid for the constraint.

Fixes rdar://9382985

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@133226 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/CGStmt.cpp b/lib/CodeGen/CGStmt.cpp
index 187d5a6c3c67ca6aeb71cc2933b3106cefc6bad3..86b9e2b997ad2d2120f9277b7f2b9cbba650d4e8 100644 (file)
--- a/lib/CodeGen/CGStmt.cpp
+++ b/lib/CodeGen/CGStmt.cpp
@@ -1278,8 +1278,11 @@ AddVariableConstraints(const std::string &Constraint, const Expr &AsmExpr,
     return Constraint;
   llvm::StringRef Register = Attr->getLabel();
   assert(Target.isValidGCCRegisterName(Register));
-  // FIXME: We should check which registers are compatible with "r" or "x".
-  if (Constraint != "r" && Constraint != "x") {
+  // We're using validateOutputConstraint here because we only care if
+  // this is a register constraint.
+  TargetInfo::ConstraintInfo Info(Constraint, "");
+  if (Target.validateOutputConstraint(Info) &&
+      !Info.allowsRegister()) {
     CGM.ErrorUnsupported(&Stmt, "__asm__");
     return Constraint;
   }

diff --git a/test/CodeGen/arm-asm-variable.c b/test/CodeGen/arm-asm-variable.c
new file mode 100644 (file)
index 0000000..a47356a
--- /dev/null
+++ b/test/CodeGen/arm-asm-variable.c
@@ -0,0 +1,26 @@
+// RUN: %clang_cc1 -triple armv7-apple-darwin9 -emit-llvm -w -o - %s | FileCheck %s
+#include <stdint.h>
+
+#define ldrex_func(p, rl, rh) \
+  __asm__ __volatile__( \
+                      "ldrexd%[_rl], %[_rh], [%[_p]]" \
+                      : [_rl] "=&r" (rl), [_rh] "=&r" (rh) \
+                      : [_p] "p" (p) : "memory")
+
+int64_t foo(int64_t v, volatile int64_t *p)
+{
+  register uint32_t rl asm("r1");
+  register uint32_t rh asm("r2");
+
+  int64_t r;
+  uint32_t t;
+
+  __asm__ __volatile__(                                                        \
+                      "ldrexd%[_rl], %[_rh], [%[_p]]"                  \
+                      : [_rl] "=&r" (rl), [_rh] "=&r" (rh)             \
+                      : [_p] "p" (p) : "memory");
+
+  // CHECK: %0 = call %0 asm sideeffect "ldrexd$0, $1, [$2]", "={r1},={r2},r,~{memory}"(i64* %tmp)
+
+  return r;
+}