Now that we use the GCC builtin <-> llvm intrinsic, dead code eliminate the handwritt...

The generated code uncovered an invalid prototype for __builtin_mips_shilo, fix it along the way.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159368 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/clang/Basic/BuiltinsMips.def b/include/clang/Basic/BuiltinsMips.def
index 0ae141cd8e0bfe111eaba76f9d0d53ebe701d679..0ddcd6fdf0c9e002988945ec37f3776ae4a9e47e 100644 (file)
--- a/include/clang/Basic/BuiltinsMips.def
+++ b/include/clang/Basic/BuiltinsMips.def
@@ -66,7 +66,7 @@ BUILTIN(__builtin_mips_shra_ph, "V2sV2si", "nc")
 BUILTIN(__builtin_mips_shra_r_ph, "V2sV2si", "nc")
 BUILTIN(__builtin_mips_shll_s_w, "iii", "nc")
 BUILTIN(__builtin_mips_shra_r_w, "iii", "nc")
-BUILTIN(__builtin_mips_shilo, "iLLii", "nc")
+BUILTIN(__builtin_mips_shilo, "LLiLLii", "nc")
 
 BUILTIN(__builtin_mips_muleu_s_ph_qbl, "V2sV4ScV2s", "nc")
 BUILTIN(__builtin_mips_muleu_s_ph_qbr, "V2sV4ScV2s", "nc")

diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp
index cf5387a10705c4161eb735f00ce38fececfbabe3..a3d4af72da16e91b9820898726167d476322b27d 100644 (file)
--- a/lib/CodeGen/CGBuiltin.cpp
+++ b/lib/CodeGen/CGBuiltin.cpp
@@ -1380,11 +1380,6 @@ Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID,
     return EmitPPCBuiltinExpr(BuiltinID, E);
   case llvm::Triple::hexagon:
     return EmitHexagonBuiltinExpr(BuiltinID, E);
-  case llvm::Triple::mips:
-  case llvm::Triple::mipsel:
-  case llvm::Triple::mips64:
-  case llvm::Triple::mips64el:
-    return EmitMipsBuiltinExpr(BuiltinID, E);
   default:
     return 0;
   }
@@ -5128,296 +5123,3 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
   }
   }
 }
-
-Value *CodeGenFunction::EmitMipsBuiltinExpr(unsigned BuiltinID,
-                                            const CallExpr *E) {
-  llvm::SmallVector<Value*, 4> Ops;
-
-  for (unsigned i = 0, e = E->getNumArgs(); i != e; i++)
-    Ops.push_back(EmitScalarExpr(E->getArg(i)));
-
-  Intrinsic::ID ID = Intrinsic::not_intrinsic;
-
-  switch (BuiltinID) {
-  default: return 0;
-  case Mips::BI__builtin_mips_addu_qb:
-    ID = Intrinsic::mips_addu_qb;
-    break;
-  case Mips::BI__builtin_mips_addu_s_qb:
-    ID = Intrinsic::mips_addu_s_qb;
-    break;
-  case Mips::BI__builtin_mips_subu_qb:
-    ID = Intrinsic::mips_subu_qb;
-    break;
-  case Mips::BI__builtin_mips_subu_s_qb:
-    ID = Intrinsic::mips_subu_s_qb;
-    break;
-  case Mips::BI__builtin_mips_addq_ph:
-    ID = Intrinsic::mips_addq_ph;
-    break;
-  case Mips::BI__builtin_mips_addq_s_ph:
-    ID = Intrinsic::mips_addq_s_ph;
-    break;
-  case Mips::BI__builtin_mips_subq_ph:
-    ID = Intrinsic::mips_subq_ph;
-    break;
-  case Mips::BI__builtin_mips_subq_s_ph:
-    ID = Intrinsic::mips_subq_s_ph;
-    break;
-  case Mips::BI__builtin_mips_madd:
-    ID = Intrinsic::mips_madd;
-    break;
-  case Mips::BI__builtin_mips_maddu:
-    ID = Intrinsic::mips_maddu;
-    break;
-  case Mips::BI__builtin_mips_msub:
-    ID = Intrinsic::mips_msub;
-    break;
-  case Mips::BI__builtin_mips_msubu:
-    ID = Intrinsic::mips_msubu;
-    break;
-  case Mips::BI__builtin_mips_addq_s_w:
-    ID = Intrinsic::mips_addq_s_w;
-    break;
-  case Mips::BI__builtin_mips_subq_s_w:
-    ID = Intrinsic::mips_subq_s_w;
-    break;
-  case Mips::BI__builtin_mips_addsc:
-    ID = Intrinsic::mips_addsc;
-    break;
-  case Mips::BI__builtin_mips_addwc:
-    ID = Intrinsic::mips_addwc;
-    break;
-  case Mips::BI__builtin_mips_modsub:
-    ID = Intrinsic::mips_modsub;
-    break;
-  case Mips::BI__builtin_mips_raddu_w_qb:
-    ID = Intrinsic::mips_raddu_w_qb;
-    break;
-  case Mips::BI__builtin_mips_absq_s_ph:
-    ID = Intrinsic::mips_absq_s_ph;
-    break;
-  case Mips::BI__builtin_mips_absq_s_w:
-    ID = Intrinsic::mips_absq_s_w;
-    break;
-  case Mips::BI__builtin_mips_precrq_qb_ph:
-    ID = Intrinsic::mips_precrq_qb_ph;
-    break;
-  case Mips::BI__builtin_mips_precrqu_s_qb_ph:
-    ID = Intrinsic::mips_precrqu_s_qb_ph;
-    break;
-  case Mips::BI__builtin_mips_precrq_ph_w:
-    ID = Intrinsic::mips_precrq_ph_w;
-    break;
-  case Mips::BI__builtin_mips_precrq_rs_ph_w:
-    ID = Intrinsic::mips_precrq_rs_ph_w;
-    break;
-  case Mips::BI__builtin_mips_preceq_w_phl:
-    ID = Intrinsic::mips_preceq_w_phl;
-    break;
-  case Mips::BI__builtin_mips_preceq_w_phr:
-    ID = Intrinsic::mips_preceq_w_phr;
-    break;
-  case Mips::BI__builtin_mips_precequ_ph_qbl:
-    ID = Intrinsic::mips_precequ_ph_qbl;
-    break;
-  case Mips::BI__builtin_mips_precequ_ph_qbr:
-    ID = Intrinsic::mips_precequ_ph_qbr;
-    break;
-  case Mips::BI__builtin_mips_precequ_ph_qbla:
-    ID = Intrinsic::mips_precequ_ph_qbla;
-    break;
-  case Mips::BI__builtin_mips_precequ_ph_qbra:
-    ID = Intrinsic::mips_precequ_ph_qbra;
-    break;
-  case Mips::BI__builtin_mips_preceu_ph_qbl:
-    ID = Intrinsic::mips_preceu_ph_qbl;
-    break;
-  case Mips::BI__builtin_mips_preceu_ph_qbr:
-    ID = Intrinsic::mips_preceu_ph_qbr;
-    break;
-  case Mips::BI__builtin_mips_preceu_ph_qbla:
-    ID = Intrinsic::mips_preceu_ph_qbla;
-    break;
-  case Mips::BI__builtin_mips_preceu_ph_qbra:
-    ID = Intrinsic::mips_preceu_ph_qbra;
-    break;
-  case Mips::BI__builtin_mips_shll_qb:
-    ID = Intrinsic::mips_shll_qb;
-    break;
-  case Mips::BI__builtin_mips_shrl_qb:
-    ID = Intrinsic::mips_shrl_qb;
-    break;
-  case Mips::BI__builtin_mips_shll_ph:
-    ID = Intrinsic::mips_shll_ph;
-    break;
-  case Mips::BI__builtin_mips_shll_s_ph:
-    ID = Intrinsic::mips_shll_s_ph;
-    break;
-  case Mips::BI__builtin_mips_shra_ph:
-    ID = Intrinsic::mips_shra_ph;
-    break;
-  case Mips::BI__builtin_mips_shra_r_ph:
-    ID = Intrinsic::mips_shra_r_ph;
-    break;
-  case Mips::BI__builtin_mips_shll_s_w:
-    ID = Intrinsic::mips_shll_s_w;
-    break;
-  case Mips::BI__builtin_mips_shra_r_w:
-    ID = Intrinsic::mips_shra_r_w;
-    break;
-  case Mips::BI__builtin_mips_shilo:
-    ID = Intrinsic::mips_shilo;
-    break;
-  case Mips::BI__builtin_mips_muleu_s_ph_qbl:
-    ID = Intrinsic::mips_muleu_s_ph_qbl;
-    break;
-  case Mips::BI__builtin_mips_muleu_s_ph_qbr:
-    ID = Intrinsic::mips_muleu_s_ph_qbr;
-    break;
-  case Mips::BI__builtin_mips_mulq_rs_ph:
-    ID = Intrinsic::mips_mulq_rs_ph;
-    break;
-  case Mips::BI__builtin_mips_muleq_s_w_phl:
-    ID = Intrinsic::mips_muleq_s_w_phl;
-    break;
-  case Mips::BI__builtin_mips_muleq_s_w_phr:
-    ID = Intrinsic::mips_muleq_s_w_phr;
-    break;
-  case Mips::BI__builtin_mips_mulsaq_s_w_ph:
-    ID = Intrinsic::mips_mulsaq_s_w_ph;
-    break;
-  case Mips::BI__builtin_mips_maq_s_w_phl:
-    ID = Intrinsic::mips_maq_s_w_phl;
-    break;
-  case Mips::BI__builtin_mips_maq_s_w_phr:
-    ID = Intrinsic::mips_maq_s_w_phr;
-    break;
-  case Mips::BI__builtin_mips_maq_sa_w_phl:
-    ID = Intrinsic::mips_maq_sa_w_phl;
-    break;
-  case Mips::BI__builtin_mips_maq_sa_w_phr:
-    ID = Intrinsic::mips_maq_sa_w_phr;
-    break;
-  case Mips::BI__builtin_mips_mult:
-    ID = Intrinsic::mips_mult;
-    break;
-  case Mips::BI__builtin_mips_multu:
-    ID = Intrinsic::mips_multu;
-    break;
-  case Mips::BI__builtin_mips_dpau_h_qbl:
-    ID = Intrinsic::mips_dpau_h_qbl;
-    break;
-  case Mips::BI__builtin_mips_dpau_h_qbr:
-    ID = Intrinsic::mips_dpau_h_qbr;
-    break;
-  case Mips::BI__builtin_mips_dpsu_h_qbl:
-    ID = Intrinsic::mips_dpsu_h_qbl;
-    break;
-  case Mips::BI__builtin_mips_dpsu_h_qbr:
-    ID = Intrinsic::mips_dpsu_h_qbr;
-    break;
-  case Mips::BI__builtin_mips_dpaq_s_w_ph:
-    ID = Intrinsic::mips_dpaq_s_w_ph;
-    break;
-  case Mips::BI__builtin_mips_dpsq_s_w_ph:
-    ID = Intrinsic::mips_dpsq_s_w_ph;
-    break;
-  case Mips::BI__builtin_mips_dpaq_sa_l_w:
-    ID = Intrinsic::mips_dpaq_sa_l_w;
-    break;
-  case Mips::BI__builtin_mips_dpsq_sa_l_w:
-    ID = Intrinsic::mips_dpsq_sa_l_w;
-    break;
-  case Mips::BI__builtin_mips_cmpu_eq_qb:
-    ID = Intrinsic::mips_cmpu_eq_qb;
-    break;
-  case Mips::BI__builtin_mips_cmpu_lt_qb:
-    ID = Intrinsic::mips_cmpu_lt_qb;
-    break;
-  case Mips::BI__builtin_mips_cmpu_le_qb:
-    ID = Intrinsic::mips_cmpu_le_qb;
-    break;
-  case Mips::BI__builtin_mips_cmpgu_eq_qb:
-    ID = Intrinsic::mips_cmpgu_eq_qb;
-    break;
-  case Mips::BI__builtin_mips_cmpgu_lt_qb:
-    ID = Intrinsic::mips_cmpgu_lt_qb;
-    break;
-  case Mips::BI__builtin_mips_cmpgu_le_qb:
-    ID = Intrinsic::mips_cmpgu_le_qb;
-    break;
-  case Mips::BI__builtin_mips_cmp_eq_ph:
-    ID = Intrinsic::mips_cmp_eq_ph;
-    break;
-  case Mips::BI__builtin_mips_cmp_lt_ph:
-    ID = Intrinsic::mips_cmp_lt_ph;
-    break;
-  case Mips::BI__builtin_mips_cmp_le_ph:
-    ID = Intrinsic::mips_cmp_le_ph;
-    break;
-  case Mips::BI__builtin_mips_extr_s_h:
-    ID = Intrinsic::mips_extr_s_h;
-    break;
-  case Mips::BI__builtin_mips_extr_w:
-    ID = Intrinsic::mips_extr_w;
-    break;
-  case Mips::BI__builtin_mips_extr_rs_w:
-    ID = Intrinsic::mips_extr_rs_w;
-    break;
-  case Mips::BI__builtin_mips_extr_r_w:
-    ID = Intrinsic::mips_extr_r_w;
-    break;
-  case Mips::BI__builtin_mips_extp:
-    ID = Intrinsic::mips_extp;
-    break;
-  case Mips::BI__builtin_mips_extpdp:
-    ID = Intrinsic::mips_extpdp;
-    break;
-  case Mips::BI__builtin_mips_wrdsp:
-    ID = Intrinsic::mips_wrdsp;
-    break;
-  case Mips::BI__builtin_mips_rddsp:
-    ID = Intrinsic::mips_rddsp;
-    break;
-  case Mips::BI__builtin_mips_insv:
-    ID = Intrinsic::mips_insv;
-    break;
-  case Mips::BI__builtin_mips_bitrev:
-    ID = Intrinsic::mips_bitrev;
-    break;
-  case Mips::BI__builtin_mips_packrl_ph:
-    ID = Intrinsic::mips_packrl_ph;
-    break;
-  case Mips::BI__builtin_mips_repl_qb:
-    ID = Intrinsic::mips_repl_qb;
-    break;
-  case Mips::BI__builtin_mips_repl_ph:
-    ID = Intrinsic::mips_repl_ph;
-    break;
-  case Mips::BI__builtin_mips_pick_qb:
-    ID = Intrinsic::mips_pick_qb;
-    break;
-  case Mips::BI__builtin_mips_pick_ph:
-    ID = Intrinsic::mips_pick_ph;
-    break;
-  case Mips::BI__builtin_mips_mthlip:
-    ID = Intrinsic::mips_mthlip;
-    break;
-  case Mips::BI__builtin_mips_bposge32:
-    ID = Intrinsic::mips_bposge32;
-    break;
-  case Mips::BI__builtin_mips_lbux:
-    ID = Intrinsic::mips_lbux;
-    break;
-  case Mips::BI__builtin_mips_lhx:
-    ID = Intrinsic::mips_lhx;
-    break;
-  case Mips::BI__builtin_mips_lwx:
-    ID = Intrinsic::mips_lwx;
-    break;
-  }
-
-  llvm::Function *F = CGM.getIntrinsic(ID);
-  return Builder.CreateCall(F, Ops, "");
-}