Fix build failures from r337347, found by clang

* Delete a no-longer-used override, and mark the other
getRegisterTypeForCallingConv() as override.
* SPE only supports i32, not i64, as the internal type, so simply remove
the type check, so that DestReg and Opc are provably always set.

GCC 6.4 did not warn about either of the above.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337350 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCFastISel.cpp b/lib/Target/PowerPC/PPCFastISel.cpp
index 19d941374004df3b870ed588fe25beb3fcd39a47..b00655b502299ec00aebc793ffc9e22778ff14e9 100644 (file)
--- a/lib/Target/PowerPC/PPCFastISel.cpp
+++ b/lib/Target/PowerPC/PPCFastISel.cpp
@@ -1223,13 +1223,11 @@ bool PPCFastISel::SelectFPToI(const Instruction *I, bool IsSigned) {
   unsigned Opc;
 
   if (PPCSubTarget->hasSPE()) {
-    if (DstVT == MVT::i32) {
-      DestReg = createResultReg(&PPC::GPRCRegClass);
-      if (IsSigned)
-        Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
-      else
-        Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
-    }
+    DestReg = createResultReg(&PPC::GPRCRegClass);
+    if (IsSigned)
+      Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ;
+    else
+      Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ;
   } else {
     DestReg = createResultReg(&PPC::F8RCRegClass);
     if (DstVT == MVT::i32)

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 48355494afee545d8cc0ab30ed8aafa228c3c3a5..1e3e14c71144afcb6e5f3326a00efea12dd78af7 100644 (file)
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1237,12 +1237,6 @@ MVT PPCTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
   return PPCTargetLowering::getRegisterType(Context, VT);
 }
 
-MVT PPCTargetLowering::getRegisterTypeForCallingConv(MVT VT) const {
-  if (Subtarget.hasSPE() && VT == MVT::f64)
-    return MVT::i32;
-  return PPCTargetLowering::getRegisterType(VT);
-}
-
 bool PPCTargetLowering::useSoftFloat() const {
   return Subtarget.useSoftFloat();
 }

diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h
index 11b974e42a0603aec513a35be494a39ed8c9c488..9b8d6435515bb1415405b39e648895b604f65d50 100644 (file)
--- a/lib/Target/PowerPC/PPCISelLowering.h
+++ b/lib/Target/PowerPC/PPCISelLowering.h
@@ -874,9 +874,8 @@ namespace llvm {
     unsigned getNumRegistersForCallingConv(LLVMContext &Context,
                                            EVT VT) const override;
 
-    MVT getRegisterTypeForCallingConv(MVT VT) const;
     MVT getRegisterTypeForCallingConv(LLVMContext &Context,
-                                      EVT VT) const;
+                                      EVT VT) const override;
 
   private:
     struct ReuseLoadInfo {