]> granicus.if.org Git - llvm/commitdiff
[X86] Correct the immediate cost for 'add/sub i64 %x, 0x80000000'.
authorCraig Topper <craig.topper@intel.com>
Sat, 28 Jul 2018 18:21:46 +0000 (18:21 +0000)
committerCraig Topper <craig.topper@intel.com>
Sat, 28 Jul 2018 18:21:46 +0000 (18:21 +0000)
X86 normally requires immediates to be a signed 32-bit value which would exclude i64 0x80000000. But for add/sub we can negate the constant and use the opposite instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338204 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86TargetTransformInfo.cpp

index 1b260d8d45dd0ee0d43f3b9224c88c47f42b695b..0257c42def29250f9b82428b438892a50a037615 100644 (file)
@@ -2332,9 +2332,15 @@ int X86TTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
     // immediates here as the normal path expects bit 31 to be sign extended.
     if (Idx == 1 && Imm.getBitWidth() == 64 && isUInt<32>(Imm.getZExtValue()))
       return TTI::TCC_Free;
-    LLVM_FALLTHROUGH;
+    ImmIdx = 1;
+    break;
   case Instruction::Add:
   case Instruction::Sub:
+    // For add/sub, we can use the opposite instruction for INT32_MIN.
+    if (Idx == 1 && Imm.getBitWidth() == 64 && isInt<32>(-Imm.getSExtValue()))
+      return TTI::TCC_Free;
+    ImmIdx = 1;
+    break;
   case Instruction::Mul:
   case Instruction::UDiv:
   case Instruction::SDiv: