[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.

Differential Revision: https://reviews.llvm.org/D38191

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@314223 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/clang/Basic/BuiltinsNVPTX.def b/include/clang/Basic/BuiltinsNVPTX.def
index 4cd839323d18b5519dd4a650a3f1d3871c801c7b..77d94cff158a9db99386b8d6ad7514c6bef5022e 100644 (file)
--- a/include/clang/Basic/BuiltinsNVPTX.def
+++ b/include/clang/Basic/BuiltinsNVPTX.def
@@ -413,6 +413,13 @@ TARGET_BUILTIN(__nvvm_vote_any_sync, "bUib", "", "ptx60")
 TARGET_BUILTIN(__nvvm_vote_uni_sync, "bUib", "", "ptx60")
 TARGET_BUILTIN(__nvvm_vote_ballot_sync, "UiUib", "", "ptx60")
 
+// Match
+TARGET_BUILTIN(__nvvm_match_any_sync_i32, "UiUiUi", "", "ptx60")
+TARGET_BUILTIN(__nvvm_match_any_sync_i64, "WiUiWi", "", "ptx60")
+// These return a pair {value, predicate}, which requires custom lowering.
+TARGET_BUILTIN(__nvvm_match_all_sync_i32p, "UiUiUii*", "", "ptx60")
+TARGET_BUILTIN(__nvvm_match_all_sync_i64p, "WiUiWii*", "", "ptx60")
+
 // Membar
 
 BUILTIN(__nvvm_membar_cta, "v", "")

diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp
index 27403cb30d1353dd2173ab853d3d99134d0f4880..f8ce0ce3751faecf20430711f5eea943af24111d 100644 (file)
--- a/lib/CodeGen/CGBuiltin.cpp
+++ b/lib/CodeGen/CGBuiltin.cpp
@@ -9589,6 +9589,21 @@ Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID,
             {Ptr->getType()->getPointerElementType(), Ptr->getType()}),
         {Ptr, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2))});
   }
+  case NVPTX::BI__nvvm_match_all_sync_i32p:
+  case NVPTX::BI__nvvm_match_all_sync_i64p: {
+    Value *Mask = EmitScalarExpr(E->getArg(0));
+    Value *Val = EmitScalarExpr(E->getArg(1));
+    Address PredOutPtr = EmitPointerWithAlignment(E->getArg(2));
+    Value *ResultPair = Builder.CreateCall(
+        CGM.getIntrinsic(BuiltinID == NVPTX::BI__nvvm_match_all_sync_i32p
+                             ? Intrinsic::nvvm_match_all_sync_i32p
+                             : Intrinsic::nvvm_match_all_sync_i64p),
+        {Mask, Val});
+    Value *Pred = Builder.CreateZExt(Builder.CreateExtractValue(ResultPair, 1),
+                                     PredOutPtr.getElementType());
+    Builder.CreateStore(Pred, PredOutPtr);
+    return Builder.CreateExtractValue(ResultPair, 0);
+  }
   default:
     return nullptr;
   }

diff --git a/lib/Headers/__clang_cuda_intrinsics.h b/lib/Headers/__clang_cuda_intrinsics.h
index 0e2141a2a17476d195e33cc6b27c8bd139581bc2..49cf384fd9034f07bbbff6844eee7b7ee0450c6c 100644 (file)
--- a/lib/Headers/__clang_cuda_intrinsics.h
+++ b/lib/Headers/__clang_cuda_intrinsics.h
@@ -92,8 +92,9 @@ __MAKE_SHUFFLES(__shfl_xor, __nvvm_shfl_bfly_i32, __nvvm_shfl_bfly_f32, 0x1f);
 
 #endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300
 
+#if CUDA_VERSION >= 9000
+#if (!defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300)
 // __shfl_sync_* variants available in CUDA-9
-#if CUDA_VERSION >= 9000 && (!defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300)
 #pragma push_macro("__MAKE_SYNC_SHUFFLES")
 #define __MAKE_SYNC_SHUFFLES(__FnName, __IntIntrinsic, __FloatIntrinsic,       \
                              __Mask)                                           \
@@ -187,8 +188,33 @@ inline __device__ unsigned int __ballot_sync(unsigned int mask, int pred) {
 
 inline __device__ unsigned int activemask() { return __nvvm_vote_ballot(1); }
 
-#endif // __CUDA_VERSION >= 9000 && (!defined(__CUDA_ARCH__) ||
-       // __CUDA_ARCH__ >= 300)
+#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300
+
+// Define __match* builtins CUDA-9 headers expect to see.
+#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 700
+inline __device__ unsigned int __match32_any_sync(unsigned int mask,
+                                                  unsigned int value) {
+  return __nvvm_match_any_sync_i32(mask, value);
+}
+
+inline __device__ unsigned long long
+__match64_any_sync(unsigned int mask, unsigned long long value) {
+  return __nvvm_match_any_sync_i64(mask, value);
+}
+
+inline __device__ unsigned int
+__match32_all_sync(unsigned int mask, unsigned int value, int *pred) {
+  return __nvvm_match_all_sync_i32p(mask, value, pred);
+}
+
+inline __device__ unsigned long long
+__match64_all_sync(unsigned int mask, unsigned long long value, int *pred) {
+  return __nvvm_match_all_sync_i64p(mask, value, pred);
+}
+#include "crt/sm_70_rt.hpp"
+
+#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 700
+#endif // __CUDA_VERSION >= 9000
 
 // sm_32 intrinsics: __ldg and __funnelshift_{l,lc,r,rc}.
 

diff --git a/test/CodeGen/builtins-nvptx-ptx60.cu b/test/CodeGen/builtins-nvptx-ptx60.cu
index 5bd9ca300973bf83eb8e84bf3d05772b8b48820d..11db9ac46ea58cb76b51716b4bc30bf36d967cb1 100644 (file)
--- a/test/CodeGen/builtins-nvptx-ptx60.cu
+++ b/test/CodeGen/builtins-nvptx-ptx60.cu
@@ -10,6 +10,8 @@
 #define __shared__ __attribute__((shared))
 #define __constant__ __attribute__((constant))
 
+typedef unsigned long long uint64_t;
+
 // We have to keep all builtins that depend on particular target feature in the
 // same function, because the codegen will stop after the very first function
 // that encounters an error, so -verify will not be able to find errors in
@@ -17,7 +19,8 @@
 
 // CHECK-LABEL: nvvm_sync
 __device__ void nvvm_sync(unsigned mask, int i, float f, int a, int b,
-                          bool pred) {
+                          bool pred, uint64_t i64) {
+
   // CHECK: call void @llvm.nvvm.bar.warp.sync(i32
   // expected-error@+1 {{'__nvvm_bar_warp_sync' needs target feature ptx60}}
   __nvvm_bar_warp_sync(mask);
@@ -73,5 +76,22 @@ __device__ void nvvm_sync(unsigned mask, int i, float f, int a, int b,
   // expected-error@+1 {{'__nvvm_vote_ballot_sync' needs target feature ptx60}}
   __nvvm_vote_ballot_sync(mask, pred);
 
+  //
+  // MATCH.{ALL,ANY}.SYNC
+  //
+
+  // CHECK: call i32 @llvm.nvvm.match.any.sync.i32(i32
+  // expected-error@+1 {{'__nvvm_match_any_sync_i32' needs target feature ptx60}}
+  __nvvm_match_any_sync_i32(mask, i);
+  // CHECK: call i64 @llvm.nvvm.match.any.sync.i64(i32
+  // expected-error@+1 {{'__nvvm_match_any_sync_i64' needs target feature ptx60}}
+  __nvvm_match_any_sync_i64(mask, i64);
+  // CHECK: call { i32, i1 } @llvm.nvvm.match.all.sync.i32p(i32
+  // expected-error@+1 {{'__nvvm_match_all_sync_i32p' needs target feature ptx60}}
+  __nvvm_match_all_sync_i32p(mask, i, &i);
+  // CHECK: call { i64, i1 } @llvm.nvvm.match.all.sync.i64p(i32
+  // expected-error@+1 {{'__nvvm_match_all_sync_i64p' needs target feature ptx60}}
+  __nvvm_match_all_sync_i64p(mask, i64, &i);
+
   // CHECK: ret void
 }