ret <2 x i64> %r
}
+define <3 x i64> @shl_sub_i64_vec_undef(<3 x i64> %x) {
+; CHECK-LABEL: @shl_sub_i64_vec_undef(
+; CHECK-NEXT: [[R:%.*]] = lshr <3 x i64> <i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808>, [[X:%.*]]
+; CHECK-NEXT: ret <3 x i64> [[R]]
+;
+ %s = sub <3 x i64> <i64 63, i64 63, i64 63>, %x
+ %r = shl <3 x i64> <i64 1, i64 undef, i64 1>, %s
+ ret <3 x i64> %r
+}
+
; Negative tests
define i32 @shl_bad_sub_i32(i32 %x) {
ret <2 x i64> %r
}
-define <3 x i64> @shl_sub_i64_vec_undef0(<3 x i64> %x) {
-; CHECK-LABEL: @shl_sub_i64_vec_undef0(
+define <3 x i64> @shl_sub_i64_vec_undef_bad(<3 x i64> %x) {
+; CHECK-LABEL: @shl_sub_i64_vec_undef_bad(
; CHECK-NEXT: [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = shl <3 x i64> <i64 1, i64 1, i64 1>, [[S]]
; CHECK-NEXT: ret <3 x i64> [[R]]
ret <3 x i64> %r
}
-define <3 x i64> @shl_sub_i64_vec_undef1(<3 x i64> %x) {
-; CHECK-LABEL: @shl_sub_i64_vec_undef1(
-; CHECK-NEXT: [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]
-; CHECK-NEXT: [[R:%.*]] = shl <3 x i64> <i64 1, i64 undef, i64 1>, [[S]]
-; CHECK-NEXT: ret <3 x i64> [[R]]
-;
- %s = sub <3 x i64> <i64 63, i64 undef, i64 63>, %x
- %r = shl <3 x i64> <i64 1, i64 undef, i64 1>, %s
- ret <3 x i64> %r
-}
-
-define <3 x i64> @shl_sub_i64_vec_undef2(<3 x i64> %x) {
-; CHECK-LABEL: @shl_sub_i64_vec_undef2(
+define <3 x i64> @shl_sub_i64_vec_undef_bad2(<3 x i64> %x) {
+; CHECK-LABEL: @shl_sub_i64_vec_undef_bad2(
; CHECK-NEXT: [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = shl <3 x i64> <i64 1, i64 undef, i64 1>, [[S]]
; CHECK-NEXT: ret <3 x i64> [[R]]