]> granicus.if.org Git - llvm/commitdiff
ARM: correct an off-by-one in an assert
authorSaleem Abdulrasool <compnerd@compnerd.org>
Wed, 17 Dec 2014 16:17:44 +0000 (16:17 +0000)
committerSaleem Abdulrasool <compnerd@compnerd.org>
Wed, 17 Dec 2014 16:17:44 +0000 (16:17 +0000)
The assert was off-by-one, resulting in failures for valid input.

Thanks to Asiri Rathnayake for pointing out the failure!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224432 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
test/MC/ARM/arm-store-deprecated.s

index 76107924095255ea32012d9445af8ef133c2605d..ecc7f0b1650e149b9b3c7203ac3ac45f58dea406 100644 (file)
@@ -77,7 +77,10 @@ static bool getITDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
 
 static bool getARMStoreDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
                                        std::string &Info) {
-  assert(MI.getNumOperands() > 4 && "expected >4 arguments");
+  if (STI.getFeatureBits() & llvm::ARM::ModeThumb)
+    return false;
+
+  assert(MI.getNumOperands() >= 4 && "expected >= 4 arguments");
   for (unsigned OI = 4, OE = MI.getNumOperands(); OI < OE; ++OI) {
     assert(MI.getOperand(OI).isReg() && "expected register");
     if (MI.getOperand(OI).getReg() == ARM::SP ||
index d8c10e2f94a2c50eb2f3fab0d66fc7b74737fa59..8a598abc424b17c4140bab0b869306a1502fc0ad 100644 (file)
@@ -145,3 +145,9 @@ push:
 @ CHECK: push {sp}
 @ CHECK: ^
 
+       .global single
+       .type single,%function
+single:
+       stmdaeq r0, {r0}
+@ CHECK-NOT: warning
+