unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign);
if (StackAlign == 0)
- return ABIArgInfo::getIndirect(0);
+ return ABIArgInfo::getIndirect(4);
// If the stack alignment is less than the type alignment, realign the
// argument.
// CHECK: declare i32 @f1() readonly
// CHECK: declare void @f2({{.*}} sret)
// CHECK: declare void @f3({{.*}} sret)
-// CHECK: declare void @f4({{.*}} byval)
-// CHECK: declare void @f5({{.*}} byval)
+// CHECK: declare void @f4({{.*}} byval align 4)
+// CHECK: declare void @f5({{.*}} byval align 4)
void f0(transp_t0 obj);
// CHECK: define void @f1_0(i32* %a0)
-// CHECK: call void @f0(%union.transp_t0* byval %{{.*}})
+// CHECK: call void @f0(%union.transp_t0* byval align 4 %{{.*}})
// CHECK: call void %{{.*}}(i8* %{{[a-z0-9]*}})
// CHECK: }
void f1_0(int *a0) {
// FIXME: llvm-gcc expands this, this may have some value for the
// backend in terms of optimization but doesn't change the ABI.
-// CHECK: define void @f9_2(%struct.s9* byval %a0)
+// CHECK: define void @f9_2(%struct.s9* byval align 4 %a0)
struct s9 {
int a : 17;
int b;
v4i32 f55(v4i32 arg) { return arg+arg; }
// CHECK: define void @f56(
-// CHECK: i8 signext %a0, %struct.s56_0* byval %a1,
+// CHECK: i8 signext %a0, %struct.s56_0* byval align 4 %a1,
// CHECK: x86_mmx %a2.coerce, %struct.s56_1* byval align 4,
// CHECK: i64 %a4.coerce, %struct.s56_2* byval align 4,
// CHECK: <4 x i32> %a6, %struct.s39* byval align 16 %a7,
// CHECK: <4 x double> %a12, %struct.s56_6* byval align 4)
// CHECK: call void (i32, ...)* @f56_0(i32 1,
-// CHECK: i32 %{{[^ ]*}}, %struct.s56_0* byval %{{[^ ]*}},
+// CHECK: i32 %{{[^ ]*}}, %struct.s56_0* byval align 4 %{{[^ ]*}},
// CHECK: x86_mmx %{{[^ ]*}}, %struct.s56_1* byval align 4 %{{[^ ]*}},
// CHECK: i64 %{{[^ ]*}}, %struct.s56_2* byval align 4 %{{[^ ]*}},
// CHECK: <4 x i32> %{{[^ ]*}}, %struct.s39* byval align 16 %{{[^ ]*}},
// RUN: FileCheck < %t %s
// CHECK: define void @f56(
-// CHECK: i8 signext %a0, %struct.s56_0* byval %a1,
+// CHECK: i8 signext %a0, %struct.s56_0* byval align 4 %a1,
// CHECK: x86_mmx %a2.coerce, %struct.s56_1* byval align 4,
// CHECK: <1 x double> %a4, %struct.s56_2* byval align 4,
// CHECK: <4 x i32> %a6, %struct.s56_3* byval align 4,
// CHECK: <4 x double> %a12, %struct.s56_6* byval align 4)
// CHECK: call void (i32, ...)* @f56_0(i32 1,
-// CHECK: i32 %{{.*}}, %struct.s56_0* byval %{{[^ ]*}},
+// CHECK: i32 %{{.*}}, %struct.s56_0* byval align 4 %{{[^ ]*}},
// CHECK: x86_mmx %{{[^ ]*}}, %struct.s56_1* byval align 4 %{{[^ ]*}},
// CHECK: <1 x double> %{{[^ ]*}}, %struct.s56_2* byval align 4 %{{[^ ]*}},
// CHECK: <4 x i32> %{{[^ ]*}}, %struct.s56_3* byval align 4 %{{[^ ]*}},
// CHECK: define void @_ZThn4_N18BasicAliasAnalysis13getModRefInfoE8CallSite
// ...
-// CHECK: %struct.CallSite* byval %CS)
+// CHECK: %struct.CallSite* byval align 4 %CS)
struct CallSite {
unsigned Ptr;
CallSite(unsigned XX) : Ptr(XX) {}
s5 f5() { return s5(); }
// CHECK: define i32 @_Z4f6_0M2s6i(i32 %a)
-// CHECK: define i64 @_Z4f6_1M2s6FivE(%{{.*}} byval)
+// CHECK: define i64 @_Z4f6_1M2s6FivE(%{{.*}} byval align 4)
// FIXME: It would be nice to avoid byval on the previous case.
struct s6 {};
typedef int s6::* s6_mdp;