assert(RealDef != nullptr && "Must have at least 1 Def");
#endif
- // We should only have one definition of the register. However to accomodate
+ // We should only have one definition of the register. However to accommodate
// the requirements of two address code we also allow definitions in
// subsequent instructions provided they also read the register. That way
// we get a single contiguous lifetime.
void DWARFDie::attribute_iterator::updateForIndex(
const DWARFAbbreviationDeclaration &AbbrDecl, uint32_t I) {
Index = I;
- // AbbrDecl must be valid befor calling this function.
+ // AbbrDecl must be valid before calling this function.
auto NumAttrs = AbbrDecl.getNumAttributes();
if (Index < NumAttrs) {
AttrValue.Attr = AbbrDecl.getAttrByIndex(Index);
return Copy;
}
- // Create a virtal register in *TLSBaseAddrReg, and populate it by
+ // Create a virtual register in *TLSBaseAddrReg, and populate it by
// inserting a copy instruction after I. Returns the new instruction.
MachineInstr *setRegister(MachineInstr &I, unsigned *TLSBaseAddrReg) {
MachineFunction *MF = I.getParent()->getParent();
return Copy;
}
-// Create a virtal register in *TLSBaseAddrReg, and populate it by
+// Create a virtual register in *TLSBaseAddrReg, and populate it by
// inserting a copy instruction after I. Returns the new instruction.
MachineInstr *SystemZLDCleanup::SetRegister(MachineInstr *I,
unsigned *TLSBaseAddrReg) {
return Copy;
}
- // Create a virtal register in *TLSBaseAddrReg, and populate it by
+ // Create a virtual register in *TLSBaseAddrReg, and populate it by
// inserting a copy instruction after I. Returns the new instruction.
MachineInstr *SetRegister(MachineInstr &I, unsigned *TLSBaseAddrReg) {
MachineFunction *MF = I.getParent()->getParent();