Value *Arg1 = II.getArgOperand(1);
Type *ResTy = II.getType();
- // muldq/muludq(undef, undef) -> undef
+ // muldq/muludq(undef, undef) -> zero (matches generic mul behavior)
if (isa<UndefValue>(Arg0) && isa<UndefValue>(Arg1))
- return UndefValue::get(ResTy);
+ return ConstantAggregateZero::get(ResTy);
return nullptr;
}
define <2 x i64> @undef_pmuludq_128(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: @undef_pmuludq_128(
-; CHECK-NEXT: ret <2 x i64> undef
+; CHECK-NEXT: ret <2 x i64> zeroinitializer
;
%1 = call <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32> undef, <4 x i32> undef)
ret <2 x i64> %1
define <4 x i64> @undef_pmuludq_256(<8 x i32> %a0, <8 x i32> %a1) {
; CHECK-LABEL: @undef_pmuludq_256(
-; CHECK-NEXT: ret <4 x i64> undef
+; CHECK-NEXT: ret <4 x i64> zeroinitializer
;
%1 = call <4 x i64> @llvm.x86.avx2.pmulu.dq(<8 x i32> undef, <8 x i32> undef)
ret <4 x i64> %1
define <8 x i64> @undef_pmuludq_512(<16 x i32> %a0, <16 x i32> %a1) {
; CHECK-LABEL: @undef_pmuludq_512(
-; CHECK-NEXT: ret <8 x i64> undef
+; CHECK-NEXT: ret <8 x i64> zeroinitializer
;
%1 = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> undef, <16 x i32> undef)
ret <8 x i64> %1
define <2 x i64> @undef_pmuldq_128(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: @undef_pmuldq_128(
-; CHECK-NEXT: ret <2 x i64> undef
+; CHECK-NEXT: ret <2 x i64> zeroinitializer
;
%1 = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> undef, <4 x i32> undef)
ret <2 x i64> %1
define <4 x i64> @undef_pmuldq_256(<8 x i32> %a0, <8 x i32> %a1) {
; CHECK-LABEL: @undef_pmuldq_256(
-; CHECK-NEXT: ret <4 x i64> undef
+; CHECK-NEXT: ret <4 x i64> zeroinitializer
;
%1 = call <4 x i64> @llvm.x86.avx2.pmul.dq(<8 x i32> undef, <8 x i32> undef)
ret <4 x i64> %1
define <8 x i64> @undef_pmuldq_512(<16 x i32> %a0, <16 x i32> %a1) {
; CHECK-LABEL: @undef_pmuldq_512(
-; CHECK-NEXT: ret <8 x i64> undef
+; CHECK-NEXT: ret <8 x i64> zeroinitializer
;
%1 = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> undef, <16 x i32> undef)
ret <8 x i64> %1