AMDGPU: Remove pointless asserts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310007 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AMDGPU/SIISelLowering.cpp b/lib/Target/AMDGPU/SIISelLowering.cpp
index cec3abb455171a631976673a577140d54689d056..7abb4636d7256e418a1d6a8cf298569d504ff3e3 100644 (file)
--- a/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1079,7 +1079,6 @@ static void allocateSpecialEntryInputVGPRs(CCState &CCInfo,
   if (Info.hasWorkItemIDX()) {
     unsigned Reg = AMDGPU::VGPR0;
     MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
-    assert(Reg == AMDGPU::VGPR0);
 
     CCInfo.AllocateReg(Reg);
     Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg));
@@ -1089,7 +1088,6 @@ static void allocateSpecialEntryInputVGPRs(CCState &CCInfo,
     unsigned Reg = AMDGPU::VGPR1;
     MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
 
-    assert(Reg == AMDGPU::VGPR1);
     CCInfo.AllocateReg(Reg);
     Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg));
   }
@@ -1098,7 +1096,6 @@ static void allocateSpecialEntryInputVGPRs(CCState &CCInfo,
     unsigned Reg = AMDGPU::VGPR2;
     MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
 
-    assert(Reg == AMDGPU::VGPR2);
     CCInfo.AllocateReg(Reg);
     Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg));
   }