[globalisel][tablegen] Add support for specific immediates in the match pattern

This enables a few rules such as ARM's uxtb instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319457 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/ARM/GlobalISel/arm-isel.ll b/test/CodeGen/ARM/GlobalISel/arm-isel.ll
index 579101e2d2af26420b936c009bae5e2690e9b151..7162815a7f70a4ecff71fb1eef70047182aef61d 100644 (file)
--- a/test/CodeGen/ARM/GlobalISel/arm-isel.ll
+++ b/test/CodeGen/ARM/GlobalISel/arm-isel.ll
@@ -35,7 +35,7 @@ entry:
 
 define zeroext i8 @test_ext_i8(i8 %x) {
 ; CHECK-LABEL: test_ext_i8:
-; CHECK: and r0, r0, #255
+; CHECK: uxtb r0, r0
 ; CHECK: bx lr
 
 entry:

diff --git a/utils/TableGen/GlobalISelEmitter.cpp b/utils/TableGen/GlobalISelEmitter.cpp
index f82b2fd3e9bb8b109aebe41c594048eabf77e5ce..d9048c231c296e693448c55f90826129337665a6 100644 (file)
--- a/utils/TableGen/GlobalISelEmitter.cpp
+++ b/utils/TableGen/GlobalISelEmitter.cpp
@@ -2812,6 +2812,14 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitUseRenderer(
     return failedImport("Dst pattern child isn't a leaf node or an MBB" + llvm::to_string(*DstChild));
   }
 
+  // It could be a specific immediate in which case we should just check for
+  // that immediate.
+  if (const IntInit *ChildIntInit =
+          dyn_cast<IntInit>(DstChild->getLeafValue())) {
+    DstMIBuilder.addRenderer<ImmRenderer>(ChildIntInit->getValue());
+    return InsertPt;
+  }
+
   // Otherwise, we're looking for a bog-standard RegisterClass operand.
   if (auto *ChildDefInit = dyn_cast<DefInit>(DstChild->getLeafValue())) {
     auto *ChildRec = ChildDefInit->getDef();