]> granicus.if.org Git - clang/commitdiff
Default enable the rtm feature only on skylake and later for now because Intel disabl...
authorEric Christopher <echristo@gmail.com>
Tue, 28 Mar 2017 23:03:19 +0000 (23:03 +0000)
committerEric Christopher <echristo@gmail.com>
Tue, 28 Mar 2017 23:03:19 +0000 (23:03 +0000)
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/core-m-processor-family-spec-update.pdf

the -mrtm option will still work normally.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@298956 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Basic/Targets.cpp
test/Preprocessor/predefined-arch-macros.c

index 23ef9f8dd6bdf27e0887b4e22a4b148bda4f572d..d80a8d5efee82ff895679c250412cf487db41a94 100644 (file)
@@ -3194,6 +3194,7 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "mpx", true);
     setFeatureEnabledImpl(Features, "sgx", true);
     setFeatureEnabledImpl(Features, "clflushopt", true);
+    setFeatureEnabledImpl(Features, "rtm", true);
     LLVM_FALLTHROUGH;
   case CK_Broadwell:
     setFeatureEnabledImpl(Features, "rdseed", true);
@@ -3204,7 +3205,6 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "lzcnt", true);
     setFeatureEnabledImpl(Features, "bmi", true);
     setFeatureEnabledImpl(Features, "bmi2", true);
-    setFeatureEnabledImpl(Features, "rtm", true);
     setFeatureEnabledImpl(Features, "fma", true);
     setFeatureEnabledImpl(Features, "movbe", true);
     LLVM_FALLTHROUGH;
index b63b6ddff59b0807b0a1c561f53dd676b3ce13f3..5252d2ce0d2e9f7d507f97112adfb89433e30d4a 100644 (file)
 // CHECK_CORE_AVX2_M32: #define __PCLMUL__ 1
 // CHECK_CORE_AVX2_M32: #define __POPCNT__ 1
 // CHECK_CORE_AVX2_M32: #define __RDRND__ 1
-// CHECK_CORE_AVX2_M32: #define __RTM__ 1
 // CHECK_CORE_AVX2_M32: #define __SSE2__ 1
 // CHECK_CORE_AVX2_M32: #define __SSE3__ 1
 // CHECK_CORE_AVX2_M32: #define __SSE4_1__ 1
 // CHECK_CORE_AVX2_M64: #define __PCLMUL__ 1
 // CHECK_CORE_AVX2_M64: #define __POPCNT__ 1
 // CHECK_CORE_AVX2_M64: #define __RDRND__ 1
-// CHECK_CORE_AVX2_M64: #define __RTM__ 1
 // CHECK_CORE_AVX2_M64: #define __SSE2_MATH__ 1
 // CHECK_CORE_AVX2_M64: #define __SSE2__ 1
 // CHECK_CORE_AVX2_M64: #define __SSE3__ 1
 // CHECK_BROADWELL_M32: #define __POPCNT__ 1
 // CHECK_BROADWELL_M32: #define __RDRND__ 1
 // CHECK_BROADWELL_M32: #define __RDSEED__ 1
-// CHECK_BROADWELL_M32: #define __RTM__ 1
 // CHECK_BROADWELL_M32: #define __SSE2__ 1
 // CHECK_BROADWELL_M32: #define __SSE3__ 1
 // CHECK_BROADWELL_M32: #define __SSE4_1__ 1
 // CHECK_BROADWELL_M64: #define __POPCNT__ 1
 // CHECK_BROADWELL_M64: #define __RDRND__ 1
 // CHECK_BROADWELL_M64: #define __RDSEED__ 1
-// CHECK_BROADWELL_M64: #define __RTM__ 1
 // CHECK_BROADWELL_M64: #define __SSE2_MATH__ 1
 // CHECK_BROADWELL_M64: #define __SSE2__ 1
 // CHECK_BROADWELL_M64: #define __SSE3__ 1