[DAG] x | x --> x

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285522 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index e78a3562a05f5e45beb00e29776adf6036b936c8..e1da385c7bd75e9d1f594d4f1add52c8d2b49f0f 100644 (file)
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3815,6 +3815,10 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
   SDValue N1 = N->getOperand(1);
   EVT VT = N1.getValueType();
 
+  // x | x --> x
+  if (N0 == N1)
+    return N0;
+
   // fold vector ops
   if (VT.isVector()) {
     if (SDValue FoldedVOp = SimplifyVBinOp(N))

diff --git a/test/CodeGen/X86/combine-or.ll b/test/CodeGen/X86/combine-or.ll
index bc439de9cf04d13efb56a389495d6578de53c581..60825d2bc72649af3ed25f4436fe527e13ea2926 100644 (file)
--- a/test/CodeGen/X86/combine-or.ll
+++ b/test/CodeGen/X86/combine-or.ll
@@ -4,7 +4,6 @@
 define i32 @or_self(i32 %x) {
 ; CHECK-LABEL: or_self:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    orl %edi, %edi
 ; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %or = or i32 %x, %x
@@ -14,7 +13,6 @@ define i32 @or_self(i32 %x) {
 define <4 x i32> @or_self_vec(<4 x i32> %x) {
 ; CHECK-LABEL: or_self_vec:
 ; CHECK:       # BB#0:
-; CHECK-NEXT:    orps %xmm0, %xmm0
 ; CHECK-NEXT:    retq
   %or = or <4 x i32> %x, %x
   ret <4 x i32> %or