[Hexagon] Recognize "s" constraint in inline-asm

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@270216 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index c205356d414549e8518c9b1c56602c0bf4b1d937..f3ab8346b8e66969d2451f491a258d4cca90c302 100644 (file)
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -6039,6 +6039,9 @@ public:
           return true;
         }
         break;
+      case 's':
+        // Relocatable constant.
+        return true;
     }
     return false;
   }

diff --git a/test/CodeGen/hexagon-inline-asm.c b/test/CodeGen/hexagon-inline-asm.c
index 1ef4b7767e41e48ab5d0c5d720bb515f9248eda9..cda3d0dcb6bd3d56eef90cd780251b104c36a670 100644 (file)
--- a/test/CodeGen/hexagon-inline-asm.c
+++ b/test/CodeGen/hexagon-inline-asm.c
@@ -3,9 +3,15 @@
 typedef int v64 __attribute__((__vector_size__(64)))
     __attribute__((aligned(64)));
 
+int g;
+
 void foo(v64 v0, v64 v1, v64 *p) {
+  int r;
   v64 q0;
   asm ("%0 = vgtw(%1.w,%2.w)" : "=q"(q0) : "v"(v0), "v"(v1));
 // CHECK: call <16 x i32> asm "$0 = vgtw($1.w,$2.w)", "=q,v,v"(<16 x i32>{{.*}}, <16 x i32>{{.*}})
   *p = q0;
+
+  asm ("%0 = memw(##%1)" : "=r"(r) : "s"(&g));
+// CHECK: call i32 asm "$0 = memw(##$1)", "=r,s"(i32* @g)
 }