case 2: // NOREX GPRs.
if (Subtarget.isTarget64BitLP64())
return &X86::GR64_NOREXRegClass;
- return Is64Bit ? &X86::X32_NOREX_ADDR_ACCESSRegClass
- : &X86::GR32_NOREXRegClass;
+ return &X86::GR32_NOREXRegClass;
case 3: // NOREX GPRs except the stack pointer (for encoding reasons).
if (Subtarget.isTarget64BitLP64())
return &X86::GR64_NOREX_NOSPRegClass;
// FIXME: We could allow all 64bit registers, but we would need
// something to check that the 32 high bits are not set.
def X32_ADDR_ACCESS : RegisterClass<"X86", [i32], 64, (add GR32, RIP)>;
-def X32_NOREX_ADDR_ACCESS : RegisterClass<"X86", [i32], 64,
- (add GR32_NOREX, RIP)>;
// A class to support the 'A' assembler constraint: EAX then EDX.
def GR32_AD : RegisterClass<"X86", [i32], 32, (add EAX, EDX)>;