[ARM] Add registers to debuginfo MIR test cases.

Summary:
MIRParserImpl::computeFunctionProperties uses MRI.getNumVirtRegs() to
set the NoVReg property. By adding a bunch of registers to the MIR test
cases, the NoVReg property is not set when importing the MIR. Otherwise
NoVReg is set after instruction selection while the machine instructions
still contain virtual registers, causing expensive checks to fail.

Reviewers: efriedma, MatzeB, aprantl

Reviewed By: MatzeB, aprantl

Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D36152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310178 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/DebugInfo/MIR/ARM/split-superreg-complex.mir b/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
index 0ebde3c1eb355f1601b08b63a2702a338d96a5a5..7aa752e1b19088b7730f25a46d2e5ba35d655bfd 100644 (file)
--- a/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
+++ b/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
@@ -1,4 +1,5 @@
-# RUN: llc -filetype=obj -o - %s | llvm-dwarfdump - | FileCheck %s
+# RUN: llc -start-before=livedebugvalues -filetype=obj -o - %s | \
+# RUN:    llvm-dwarfdump - | FileCheck %s
 #
 # This is an artificial example of a debug value residing in a composite
 # location with a complex expression. Because the semantics of applying a DWARF

diff --git a/test/DebugInfo/MIR/ARM/split-superreg-piece.mir b/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
index 422e7ed848214b4f352cb4482e0e72da06a173cd..8ac763b0f06fc23424f69a25c83aa9f3f16790f9 100644 (file)
--- a/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
+++ b/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
@@ -1,11 +1,12 @@
-# RUN: llc -filetype=obj -o - %s | llvm-dwarfdump - | FileCheck %s
+# RUN: llc -start-before=livedebugvalues -filetype=obj -o - %s | \
+# RUN:     llvm-dwarfdump - | FileCheck %s
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_variable
 # CHECK-NEXT: DW_AT_location [DW_FORM_data4]   ([[OFS:.*]])
 # CHECK-NEXT: DW_AT_name {{.*}}"vec"
 # CHECK: .debug_loc contents:
-# CHECK: [[OFS]]: Beginning address offset: 0x0000000000000016
-# CHECK:             Ending address offset: 0x000000000000001e
+# CHECK: [[OFS]]: Beginning address offset: 0x0000000000000010
+# CHECK:             Ending address offset: 0x0000000000000018
 # CHECK:              Location description: 93 10 90 80 02 93 08 90 81 02 93 08 
 #                  piece 0x00000010, d0, piece 0x00000008, d1, piece 0x00000008
 --- |

diff --git a/test/DebugInfo/MIR/ARM/split-superreg.mir b/test/DebugInfo/MIR/ARM/split-superreg.mir
index 9b56f9f38577f3553427e17ba6e2276e9bf0491e..a2c38442da9fa968940b6c22bf9db9be7dcef528 100644 (file)
--- a/test/DebugInfo/MIR/ARM/split-superreg.mir
+++ b/test/DebugInfo/MIR/ARM/split-superreg.mir
@@ -1,11 +1,12 @@
-# RUN: llc -filetype=obj -o - %s | llvm-dwarfdump - | FileCheck %s
+# RUN: llc -start-before=livedebugvalues -filetype=obj -o - %s | \
+# RUN:     llvm-dwarfdump - | FileCheck %s
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_variable
 # CHECK-NEXT: DW_AT_location [DW_FORM_data4]   ([[OFS:.*]])
 # CHECK-NEXT: DW_AT_name {{.*}}"vec"
 # CHECK: .debug_loc contents:
-# CHECK: [[OFS]]: Beginning address offset: 0x0000000000000016
-# CHECK:             Ending address offset: 0x000000000000001e
+# CHECK: [[OFS]]: Beginning address offset: 0x0000000000000010
+# CHECK:             Ending address offset: 0x0000000000000018
 # CHECK:              Location description: 90 80 02 93 08 90 81 02 93 08 
 #                                           d0, piece 0x00000008, d1, piece 0x00000008
 --- |