[SystemZ] Add support for missing instructions

Summary:
Add support to allow clang integrated assembler to recognize some
missing instructions, for openssl.

Instructions are:
LM, LMH, LMY, STM, STMH, STMY, ICM, ICMH, ICMY, SLA, SLAK, TML, TMH, EX, EXRL.

Reviewers: uweigand

Subscribers: koriakin, llvm-commits

Differential Revision: http://reviews.llvm.org/D22050

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274869 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td
index 8ab3ef65480d26bb288960f66c8c3357c0344d4a..91181dee04ce1aa3cb33b3c3d8474ed8fe2ccdfa 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrFormats.td
+++ b/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -1060,12 +1060,30 @@ class BranchUnaryRI<string mnemonic, bits<12> opcode, RegisterOperand cls>
   let DisableEncoding = "$R1src";
 }
 
-class LoadMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls>
-  : InstRSY<opcode, (outs cls:$R1, cls:$R3), (ins bdaddr20only:$BD2),
+class LoadMultipleRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
+                     AddressingMode mode = bdaddr12only>
+  : InstRS<opcode, (outs cls:$R1, cls:$R3), (ins mode:$BD2),
+           mnemonic#"\t$R1, $R3, $BD2", []> {
+  let mayLoad = 1;
+}
+
+class LoadMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
+                      AddressingMode mode = bdaddr20only>
+  : InstRSY<opcode, (outs cls:$R1, cls:$R3), (ins mode:$BD2),
             mnemonic#"\t$R1, $R3, $BD2", []> {
   let mayLoad = 1;
 }
 
+multiclass LoadMultipleRSPair<string mnemonic, bits<8> rsOpcode,
+                              bits<16> rsyOpcode, RegisterOperand cls> {
+  let DispKey = mnemonic ## #cls in {
+    let DispSize = "12" in
+      def "" : LoadMultipleRS<mnemonic, rsOpcode, cls, bdaddr12pair>;
+    let DispSize = "20" in
+      def Y  : LoadMultipleRSY<mnemonic#"y", rsyOpcode, cls, bdaddr20pair>;
+  }
+}
+
 class LoadMultipleVRSa<string mnemonic, bits<16> opcode>
   : InstVRSa<opcode, (outs VR128:$V1, VR128:$V3), (ins bdaddr12only:$BD2),
              mnemonic#"\t$V1, $V3, $BD2", []> {
@@ -1141,12 +1159,30 @@ class StoreLengthVRSb<string mnemonic, bits<16> opcode,
   let AccessBytes = bytes;
 }
 
-class StoreMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls>
-  : InstRSY<opcode, (outs), (ins cls:$R1, cls:$R3, bdaddr20only:$BD2),
+class StoreMultipleRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
+                      AddressingMode mode = bdaddr12only>
+  : InstRS<opcode, (outs), (ins cls:$R1, cls:$R3, mode:$BD2),
+           mnemonic#"\t$R1, $R3, $BD2", []> {
+  let mayStore = 1;
+}
+
+class StoreMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
+                       AddressingMode mode = bdaddr20only>
+  : InstRSY<opcode, (outs), (ins cls:$R1, cls:$R3, mode:$BD2),
             mnemonic#"\t$R1, $R3, $BD2", []> {
   let mayStore = 1;
 }
 
+multiclass StoreMultipleRSPair<string mnemonic, bits<8> rsOpcode,
+                               bits<16> rsyOpcode, RegisterOperand cls> {
+  let DispKey = mnemonic ## #cls in {
+    let DispSize = "12" in
+      def "" : StoreMultipleRS<mnemonic, rsOpcode, cls, bdaddr12pair>;
+    let DispSize = "20" in
+      def Y  : StoreMultipleRSY<mnemonic#"y", rsyOpcode, cls, bdaddr20pair>;
+  }
+}
+
 class StoreMultipleVRSa<string mnemonic, bits<16> opcode>
   : InstVRSa<opcode, (outs), (ins VR128:$V1, VR128:$V3, bdaddr12only:$BD2),
              mnemonic#"\t$V1, $V3, $BD2", []> {
@@ -1979,6 +2015,40 @@ class TernaryRRD<string mnemonic, bits<16> opcode,
   let DisableEncoding = "$R1src";
 }
 
+class TernaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
+                bits<5> bytes, AddressingMode mode = bdaddr12only>
+  : InstRS<opcode, (outs cls:$R1),
+          (ins cls:$R1src, imm32zx4:$R3, mode:$BD2),
+           mnemonic#"\t$R1, $R3, $BD2", []> {
+
+  let Constraints = "$R1 = $R1src";
+  let DisableEncoding = "$R1src";
+  let mayLoad = 1;
+  let AccessBytes = bytes;
+}
+
+class TernaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
+                bits<5> bytes, AddressingMode mode = bdaddr20only>
+  : InstRSY<opcode, (outs cls:$R1),
+           (ins cls:$R1src, imm32zx4:$R3, mode:$BD2),
+            mnemonic#"\t$R1, $R3, $BD2", []> {
+
+  let Constraints = "$R1 = $R1src";
+  let DisableEncoding = "$R1src";
+  let mayLoad = 1;
+  let AccessBytes = bytes;
+}
+
+multiclass TernaryRSPair<string mnemonic, bits<8> rsOpcode, bits<16> rsyOpcode,
+                         RegisterOperand cls, bits<5> bytes> {
+  let DispKey = mnemonic ## #cls in {
+    let DispSize = "12" in
+      def "" : TernaryRS<mnemonic, rsOpcode, cls, bytes, bdaddr12pair>;
+    let DispSize = "20" in
+      def Y  : TernaryRSY<mnemonic#"y", rsyOpcode, cls, bytes, bdaddr20pair>;
+  }
+}
+
 class TernaryRXF<string mnemonic, bits<16> opcode, SDPatternOperator operator,
                  RegisterOperand cls, SDPatternOperator load, bits<5> bytes>
   : InstRXF<opcode, (outs cls:$R1),

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index 012d170552f37b252bee878bd7d04abb047607ee..6f77873872b849a7e5d32f9a33c7e65f9c65f5a0 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -702,10 +702,14 @@ def  : StoreGR64PC<STRL, aligned_truncstorei32>;
 //===----------------------------------------------------------------------===//
 
 // Multi-register loads.
+defm LM : LoadMultipleRSPair<"lm", 0x98, 0xEB98, GR32>;
 def LMG : LoadMultipleRSY<"lmg", 0xEB04, GR64>;
+def LMH : LoadMultipleRSY<"lmh", 0xEB96, GRH32>;
 
 // Multi-register stores.
+defm STM : StoreMultipleRSPair<"stm", 0x90, 0xEB90, GR32>;
 def STMG : StoreMultipleRSY<"stmg", 0xEB24, GR64>;
+def STMH : StoreMultipleRSY<"stmh", 0xEB26, GRH32>;
 
 //===----------------------------------------------------------------------===//
 // Byte swaps
@@ -814,6 +818,11 @@ defm : InsertMem<"inserti8", IC32Y, GR32, azextloadi8, bdxaddr20pair>;
 defm : InsertMem<"inserti8", IC,  GR64, azextloadi8, bdxaddr12pair>;
 defm : InsertMem<"inserti8", ICY, GR64, azextloadi8, bdxaddr20pair>;
 
+let Defs = [CC] in {
+  defm ICM : TernaryRSPair<"icm", 0xBF, 0xEB81, GR32, 0>;
+  def ICMH : TernaryRSY<"icmh", 0xEB80, GRH32, 0>;
+}
+
 // Insertions of a 16-bit immediate, leaving other bits unaffected.
 // We don't have or_as_insert equivalents of these operations because
 // OI is available instead.
@@ -1187,6 +1196,7 @@ def DLG  : BinaryRXY<"dlg",  0xE387, z_udivrem64, GR128, load, 8>;
 // Shift left.
 let hasSideEffects = 0 in {
   defm SLL : BinaryRSAndK<"sll", 0x89, 0xEBDF, shl, GR32>;
+  defm SLA : BinaryRSAndK<"sla", 0x8B, 0xEBDD, null_frag, GR32>;
   def SLLG : BinaryRSY<"sllg", 0xEB0D, shl, GR64>;
 }
 
@@ -1365,6 +1375,9 @@ let Defs = [CC] in {
   defm TM : CompareSIPair<"tm", 0x91, 0xEB51, z_tm_mem, anyextloadi8, imm32zx8>;
 }
 
+def TML : InstAlias<"tml\t$R, $I", (TMLL GR32:$R, imm32ll16:$I), 0>;
+def TMH : InstAlias<"tmh\t$R, $I", (TMLH GR32:$R, imm32lh16:$I), 0>;
+
 //===----------------------------------------------------------------------===//
 // Prefetch
 //===----------------------------------------------------------------------===//
@@ -1648,6 +1661,12 @@ let hasSideEffects = 1, Defs = [CC], mayStore = 1 in
                        "stfle\t$BD2",
                        []>;
 
+let hasSideEffects = 1 in {
+  def EX   : InstRX<0x44, (outs), (ins GR64:$R1, bdxaddr12only:$XBD2),
+                  "ex\t$R1, $XBD2", []>;
+  def EXRL : InstRIL<0xC60, (outs), (ins GR64:$R1, pcrel32:$I2),
+                     "exrl\t$R1, $I2", []>;
+}
 
 
 //===----------------------------------------------------------------------===//

diff --git a/test/MC/Disassembler/SystemZ/insns-pcrel.txt b/test/MC/Disassembler/SystemZ/insns-pcrel.txt
index b7edab65e7035c6f0ef97682c3edf5ce08572b85..d3579481e1fa87e1a328fb29aa1e45dea7ed907d 100644 (file)
--- a/test/MC/Disassembler/SystemZ/insns-pcrel.txt
+++ b/test/MC/Disassembler/SystemZ/insns-pcrel.txt
@@ -1730,3 +1730,35 @@
 # 0x000009d2:
 # CHECK: clij %r0, 0, 15, 0x9d2
 0xec 0x0f 0x00 0x00 0x00 0x7f
+
+# 0x000009d8:
+# CHECK: exrl %r0, 0x9d8
+0xc6 0x00 0x00 0x00 0x00 0x00
+
+# 0x000009de:
+# CHECK: exrl %r15, 0x9de
+0xc6 0xf0 0x00 0x00 0x00 0x00
+
+# 0x000009e4:
+# CHECK: exrl %r0, 0x9e2
+0xc6 0x00 0xff 0xff 0xff 0xff
+
+# 0x000009ea:
+# CHECK: exrl %r15, 0x9e8
+0xc6 0xf0 0xff 0xff 0xff 0xff
+
+# 0x000009f0:
+# CHECK: exrl %r0, 0xffffffff000009f0
+0xc6 0x00 0x80 0x00 0x00 0x00
+
+# 0x000009f6:
+# CHECK: exrl %r15, 0xffffffff000009f6
+0xc6 0xf0 0x80 0x00 0x00 0x00
+
+# 0x000009fc:
+# CHECK: exrl %r0, 0x1000009fa
+0xc6 0x00 0x7f 0xff 0xff 0xff
+
+# 0x00000a02:
+# CHECK: exrl %r15, 0x100000a00
+0xc6 0xf0 0x7f 0xff 0xff 0xff

diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt
index 29c1ece1cb441c0f07b4103da4811a053a8aecfa..80756baed6ba8fb828963bcb4f0afa5eaa349a04 100644 (file)
--- a/test/MC/Disassembler/SystemZ/insns.txt
+++ b/test/MC/Disassembler/SystemZ/insns.txt
@@ -3208,6 +3208,27 @@
 # CHECK: etnd %r7
 0xb2 0xec 0x00 0x70
 
+# CHECK: ex %r0, 0
+0x44 0x00 0x00 0x00
+
+# CHECK: ex %r0, 4095
+0x44 0x00 0x0f 0xff
+
+# CHECK: ex %r0, 0(%r1)
+0x44 0x00 0x10 0x00
+
+# CHECK: ex %r0, 0(%r15)
+0x44 0x00 0xf0 0x00
+
+# CHECK: ex %r0, 4095(%r1,%r15)
+0x44 0x01 0xff 0xff
+
+# CHECK: ex %r0, 4095(%r15,%r1)
+0x44 0x0f 0x1f 0xff
+
+# CHECK: ex %r15, 0
+0x44 0xf0 0x00 0x00
+
 # CHECK: fidbr %f0, 0, %f0
 0xb3 0x5f 0x00 0x00
 
@@ -3340,6 +3361,87 @@
 # CHECK: ic %r15, 0
 0x43 0xf0 0x00 0x00
 
+# CHECK: icm %r0, 0, 0
+0xbf 0x00 0x00 0x00
+
+# CHECK: icm %r0, 15, 4095
+0xbf 0x0f 0x0f 0xff
+
+# CHECK: icm %r0, 0, 0(%r1)
+0xbf 0x00 0x10 0x00
+
+# CHECK: icm %r0, 0, 0(%r15)
+0xbf 0x00 0xf0 0x00
+
+# CHECK: icm %r0, 15, 4095(%r15)
+0xbf 0x0f 0xff 0xff
+
+# CHECK: icm %r0, 0, 4095(%r1)
+0xbf 0x00 0x1f 0xff
+
+# CHECK: icm %r15, 0, 0
+0xbf 0xf0 0x00 0x00
+
+# CHECK: icmh %r0, 0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x80
+
+# CHECK: icmh %r0, 0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x80
+
+# CHECK: icmh %r0, 15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x80
+
+# CHECK: icmh %r0, 15, 1
+0xeb 0x0f 0x00 0x01 0x00 0x80
+
+# CHECK: icmh %r0, 8, 524287
+0xeb 0x08 0x0f 0xff 0x7f 0x80
+
+# CHECK: icmh %r0, 8, 0(%r1)
+0xeb 0x08 0x10 0x00 0x00 0x80
+
+# CHECK: icmh %r0, 4, 0(%r15)
+0xeb 0x04 0xf0 0x00 0x00 0x80
+
+# CHECK: icmh %r0, 4, 524287(%r15)
+0xeb 0x04 0xff 0xff 0x7f 0x80
+
+# CHECK: icmh %r0, 0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x80
+
+# CHECK: icmh %r15, 0, 0
+0xeb 0xf0 0x00 0x00 0x00 0x80
+
+# CHECK: icmy %r0, 0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x81
+
+# CHECK: icmy %r0, 0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x81
+
+# CHECK: icmy %r0, 15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x81
+
+# CHECK: icmy %r0, 15, 1
+0xeb 0x0f 0x00 0x01 0x00 0x81
+
+# CHECK: icmy %r0, 8, 524287
+0xeb 0x08 0x0f 0xff 0x7f 0x81
+
+# CHECK: icmy %r0, 8, 0(%r1)
+0xeb 0x08 0x10 0x00 0x00 0x81
+
+# CHECK: icmy %r0, 4, 0(%r15)
+0xeb 0x04 0xf0 0x00 0x00 0x81
+
+# CHECK: icmy %r0, 4, 524287(%r15)
+0xeb 0x04 0xff 0xff 0x7f 0x81
+
+# CHECK: icmy %r0, 0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x81
+
+# CHECK: icmy %r15, 0, 0
+0xeb 0xf0 0x00 0x00 0x00 0x81
+
 # CHECK: icy %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x73
 
@@ -4906,6 +5008,36 @@
 # CHECK: llill %r15, 0
 0xa5 0xff 0x00 0x00
 
+# CHECK: lm %r0, %r0, 0
+0x98 0x00 0x00 0x00
+
+# CHECK: lm %r0, %r15, 0
+0x98 0x0f 0x00 0x00
+
+# CHECK: lm %r14, %r15, 0
+0x98 0xef 0x00 0x00
+
+# CHECK: lm %r15, %r15, 0
+0x98 0xff 0x00 0x00
+
+# CHECK: lm %r0, %r0, 4095
+0x98 0x00 0x0f 0xff
+
+# CHECK: lm %r0, %r0, 1
+0x98 0x00 0x00 0x01
+
+# CHECK: lm %r0, %r0, 0(%r1)
+0x98 0x00 0x10 0x00
+
+# CHECK: lm %r0, %r0, 0(%r15)
+0x98 0x00 0xf0 0x00
+
+# CHECK: lm %r0, %r0, 4095(%r1)
+0x98 0x00 0x1f 0xff
+
+# CHECK: lm %r0, %r0, 4095(%r15)
+0x98 0x00 0xff 0xff
+
 # CHECK: lmg %r0, %r0, 0
 0xeb 0x00 0x00 0x00 0x00 0x04
 
@@ -4945,6 +5077,84 @@
 # CHECK: lmg %r0, %r0, 524287(%r15)
 0xeb 0x00 0xff 0xff 0x7f 0x04
 
+# CHECK: lmh %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r14, %r15, 0
+0xeb 0xef 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x96
+
+# CHECK: lmh %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x96
+
+# CHECK: lmh %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x96
+
+# CHECK: lmh %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x96
+
+# CHECK: lmh %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x96
+
+# CHECK: lmh %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x96
+
+# CHECK: lmy %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r14, %r15, 0
+0xeb 0xef 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x98
+
+# CHECK: lmy %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x98
+
+# CHECK: lmy %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x98
+
+# CHECK: lmy %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x98
+
+# CHECK: lmy %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x98
+
+# CHECK: lmy %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x98
+
 # CHECK: lndbr %f0, %f9
 0xb3 0x11 0x00 0x09
 
@@ -7552,6 +7762,66 @@
 # CHECK: shy %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x7b
 
+# CHECK: sla %r0, 0
+0x8b 0x00 0x00 0x00
+
+# CHECK: sla %r7, 0
+0x8b 0x70 0x00 0x00
+
+# CHECK: sla %r15, 0
+0x8b 0xf0 0x00 0x00
+
+# CHECK: sla %r0, 4095
+0x8b 0x00 0x0f 0xff
+
+# CHECK: sla %r0, 0(%r1)
+0x8b 0x00 0x10 0x00
+
+# CHECK: sla %r0, 0(%r15)
+0x8b 0x00 0xf0 0x00
+
+# CHECK: sla %r0, 4095(%r1)
+0x8b 0x00 0x1f 0xff
+
+# CHECK: sla %r0, 4095(%r15)
+0x8b 0x00 0xff 0xff
+
+# CHECK: slak %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xdd
+
+# CHECK: slak %r15, %r1, 0
+0xeb 0xf1 0x00 0x00 0x00 0xdd
+
+# CHECK: slak %r1, %r15, 0
+0xeb 0x1f 0x00 0x00 0x00 0xdd
+
+# CHECK: slak %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0xdd
+
+# CHECK: slak %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xdd
+
+# CHECK: slak %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xdd
+
+# CHECK: slak %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xdd
+
+# CHECK: slak %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xdd
+
+# CHECK: slak %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xdd
+
+# CHECK: slak %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xdd
+
+# CHECK: slak %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xdd
+
+# CHECK: slak %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xdd
+
 # CHECK: slbgr %r0, %r0
 0xb9 0x89 0x00 0x00
 
@@ -8605,6 +8875,36 @@
 # CHECK: sthy %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x70
 
+# CHECK: stm %r0, %r0, 0
+0x90 0x00 0x00 0x00
+
+# CHECK: stm %r0, %r15, 0
+0x90 0x0f 0x00 0x00
+
+# CHECK: stm %r14, %r15, 0
+0x90 0xef 0x00 0x00
+
+# CHECK: stm %r15, %r15, 0
+0x90 0xff 0x00 0x00
+
+# CHECK: stm %r0, %r0, 4095
+0x90 0x00 0x0f 0xff
+
+# CHECK: stm %r0, %r0, 1
+0x90 0x00 0x00 0x01
+
+# CHECK: stm %r0, %r0, 0(%r1)
+0x90 0x00 0x10 0x00
+
+# CHECK: stm %r0, %r0, 0(%r15)
+0x90 0x00 0xf0 0x00
+
+# CHECK: stm %r0, %r0, 4095(%r1)
+0x90 0x00 0x1f 0xff
+
+# CHECK: stm %r0, %r0, 4095(%r15)
+0x90 0x00 0xff 0xff
+
 # CHECK: stmg %r0, %r0, 0
 0xeb 0x00 0x00 0x00 0x00 0x24
 
@@ -8644,6 +8944,84 @@
 # CHECK: stmg %r0, %r0, 524287(%r15)
 0xeb 0x00 0xff 0xff 0x7f 0x24
 
+# CHECK: stmh %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r14, %r15, 0
+0xeb 0xef 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x26
+
+# CHECK: stmh %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x26
+
+# CHECK: stmh %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x26
+
+# CHECK: stmh %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x26
+
+# CHECK: stmh %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x26
+
+# CHECK: stmh %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x26
+
+# CHECK: stmy %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r14, %r15, 0
+0xeb 0xef 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x90
+
+# CHECK: stmy %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x90
+
+# CHECK: stmy %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x90
+
+# CHECK: stmy %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x90
+
+# CHECK: stmy %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x90
+
+# CHECK: stmy %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x90
+
 # CHECK: strvg %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x2f
 

diff --git a/test/MC/SystemZ/insn-bad-z196.s b/test/MC/SystemZ/insn-bad-z196.s
index 1bd70a871ed2af776b01b05217010a999c04ea0d..e94f837a091b76135da7ab4e56ef6aa06d35aa13 100644 (file)
--- a/test/MC/SystemZ/insn-bad-z196.s
+++ b/test/MC/SystemZ/insn-bad-z196.s
@@ -606,6 +606,20 @@
        risblg  %r0,%r0,-1,0,0
        risblg  %r0,%r0,256,0,0
 
+#CHECK: error: invalid operand
+#CHECK: slak   %r0,%r0,-524289
+#CHECK: error: invalid operand
+#CHECK: slak   %r0,%r0,524288
+#CHECK: error: %r0 used in an address
+#CHECK: slak   %r0,%r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: slak   %r0,%r0,0(%r1,%r2)
+
+       slak    %r0,%r0,-524289
+       slak    %r0,%r0,524288
+       slak    %r0,%r0,0(%r0)
+       slak    %r0,%r0,0(%r1,%r2)
+
 #CHECK: error: invalid operand
 #CHECK: sllk   %r0,%r0,-524289
 #CHECK: error: invalid operand

diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index 8fa2149cae9ba4f9e9f87499046d10ed0a327c89..d4cc38b2bdd6ebd6adb9792a65cd6e1693203389 100644 (file)
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -1411,6 +1411,14 @@
        dxbr    %f0, %f2
        dxbr    %f2, %f0
 
+#CHECK: error: invalid operand
+#CHECK: ex      %r0, -1
+#CHECK: error: invalid operand
+#CHECK: ex      %r0, 4096
+
+        ex      %r0, -1
+        ex      %r0, 4096
+
 #CHECK: error: invalid operand
 #CHECK: fidbr  %f0, -1, %f0
 #CHECK: error: invalid operand
@@ -1469,6 +1477,48 @@
        ic      %r0, -1
        ic      %r0, 4096
 
+#CHECK: error: invalid operand
+#CHECK: icm    %r0, 0, -1
+#CHECK: error: invalid operand
+#CHECK: icm    %r0, 0, 4096
+#CHECK: error: invalid operand
+#CHECK: icm    %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: icm    %r0, 16, 0
+
+       icm     %r0, 0, -1
+       icm     %r0, 0, 4096
+       icm     %r0, -1, 0
+       icm     %r0, 16, 0
+
+#CHECK: error: invalid operand
+#CHECK: icmh   %r0, 0, -524289
+#CHECK: error: invalid operand
+#CHECK: icmh   %r0, 0, 524288
+#CHECK: error: invalid operand
+#CHECK: icmh   %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: icmh   %r0, 16, 0
+
+       icmh    %r0, 0, -524289
+       icmh    %r0, 0, 524288
+       icmh    %r0, -1, 0
+       icmh    %r0, 16, 0
+
+#CHECK: error: invalid operand
+#CHECK: icmy   %r0, 0, -524289
+#CHECK: error: invalid operand
+#CHECK: icmy   %r0, 0, 524288
+#CHECK: error: invalid operand
+#CHECK: icmy   %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: icmy   %r0, 16, 0
+
+       icmy    %r0, 0, -524289
+       icmy    %r0, 0, 524288
+       icmy    %r0, -1, 0
+       icmy    %r0, 16, 0
+
 #CHECK: error: invalid operand
 #CHECK: icy    %r0, -524289
 #CHECK: error: invalid operand
@@ -1979,6 +2029,14 @@
        llill   %r0, -1
        llill   %r0, 0x10000
 
+#CHECK: error: invalid operand
+#CHECK: lm     %r0, %r0, 4096
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lm     %r0, %r0, 0(%r1,%r2)
+
+       lm      %r0, %r0, 4096
+       lm      %r0, %r0, 0(%r1,%r2)
+
 #CHECK: error: invalid operand
 #CHECK: lmg    %r0, %r0, -524289
 #CHECK: error: invalid operand
@@ -1990,6 +2048,28 @@
        lmg     %r0, %r0, 524288
        lmg     %r0, %r0, 0(%r1,%r2)
 
+#CHECK: error: invalid operand
+#CHECK: lmh    %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lmh    %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lmh    %r0, %r0, 0(%r1,%r2)
+
+       lmh     %r0, %r0, -524289
+       lmh     %r0, %r0, 524288
+       lmh     %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lmy    %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lmy    %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lmy    %r0, %r0, 0(%r1,%r2)
+
+       lmy     %r0, %r0, -524289
+       lmy     %r0, %r0, 524288
+       lmy     %r0, %r0, 0(%r1,%r2)
+
 #CHECK: error: invalid register pair
 #CHECK: lnxbr  %f0, %f2
 #CHECK: error: invalid register pair
@@ -2999,6 +3079,25 @@
 
        slgrk   %r2,%r3,%r4
 
+#CHECK: error: invalid operand
+#CHECK: sla    %r0,-1
+#CHECK: error: invalid operand
+#CHECK: sla    %r0,4096
+#CHECK: error: %r0 used in an address
+#CHECK: sla    %r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: sla    %r0,0(%r1,%r2)
+
+       sla     %r0,-1
+       sla     %r0,4096
+       sla     %r0,0(%r0)
+       sla     %r0,0(%r1,%r2)
+
+#CHECK: error: {{(instruction requires: distinct-ops)?}}
+#CHECK: slak   %r2,%r3,4(%r5)
+
+       slak    %r2,%r3,4(%r5)
+
 #CHECK: error: invalid operand
 #CHECK: sll    %r0,-1
 #CHECK: error: invalid operand
@@ -3263,6 +3362,14 @@
 
        stfh    %r0, 0
 
+#CHECK: error: invalid operand
+#CHECK: stm    %r0, %r0, 4096
+#CHECK: error: invalid use of indexed addressing
+#CHECK: stm    %r0, %r0, 0(%r1,%r2)
+
+       stm     %r0, %r0, 4096
+       stm     %r0, %r0, 0(%r1,%r2)
+
 #CHECK: error: invalid operand
 #CHECK: stmg   %r0, %r0, -524289
 #CHECK: error: invalid operand
@@ -3274,6 +3381,28 @@
        stmg    %r0, %r0, 524288
        stmg    %r0, %r0, 0(%r1,%r2)
 
+#CHECK: error: invalid operand
+#CHECK: stmh   %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: stmh   %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: stmh   %r0, %r0, 0(%r1,%r2)
+
+       stmh    %r0, %r0, -524289
+       stmh    %r0, %r0, 524288
+       stmh    %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: stmy   %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: stmy   %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: stmy   %r0, %r0, 0(%r1,%r2)
+
+       stmy    %r0, %r0, -524289
+       stmy    %r0, %r0, 524288
+       stmy    %r0, %r0, 0(%r1,%r2)
+
 #CHECK: error: offset out of range
 #CHECK: strl   %r0, -0x1000000002
 #CHECK: error: offset out of range
@@ -3385,6 +3514,14 @@
        tmhl    %r0, -1
        tmhl    %r0, 0x10000
 
+#CHECK: error: invalid operand
+#CHECK: tmh    %r0, -1
+#CHECK: error: invalid operand
+#CHECK: tmh    %r0, 0x10000
+
+       tmh     %r0, -1
+       tmh     %r0, 0x10000
+
 #CHECK: error: invalid operand
 #CHECK: tmlh   %r0, -1
 #CHECK: error: invalid operand
@@ -3393,6 +3530,14 @@
        tmlh    %r0, -1
        tmlh    %r0, 0x10000
 
+#CHECK: error: invalid operand
+#CHECK: tml    %r0, -1
+#CHECK: error: invalid operand
+#CHECK: tml    %r0, 0x10000
+
+       tml     %r0, -1
+       tml     %r0, 0x10000
+
 #CHECK: error: invalid operand
 #CHECK: tmll   %r0, -1
 #CHECK: error: invalid operand

diff --git a/test/MC/SystemZ/insn-good-z196.s b/test/MC/SystemZ/insn-good-z196.s
index b7c48c11032e3c146cd1b54db671e7748e379608..fb2c2495d7af9f9171ce407c8483453f65c93bab 100644 (file)
--- a/test/MC/SystemZ/insn-good-z196.s
+++ b/test/MC/SystemZ/insn-good-z196.s
@@ -1123,6 +1123,32 @@
        sgrk    %r15,%r0,%r0
        sgrk    %r7,%r8,%r9
 
+#CHECK: slak   %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xdd]
+#CHECK: slak   %r15, %r1, 0            # encoding: [0xeb,0xf1,0x00,0x00,0x00,0xdd]
+#CHECK: slak   %r1, %r15, 0            # encoding: [0xeb,0x1f,0x00,0x00,0x00,0xdd]
+#CHECK: slak   %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0xdd]
+#CHECK: slak   %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xdd]
+#CHECK: slak   %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xdd]
+#CHECK: slak   %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xdd]
+#CHECK: slak   %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xdd]
+#CHECK: slak   %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xdd]
+#CHECK: slak   %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xdd]
+#CHECK: slak   %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xdd]
+#CHECK: slak   %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xdd]
+
+       slak    %r0,%r0,0
+       slak    %r15,%r1,0
+       slak    %r1,%r15,0
+       slak    %r15,%r15,0
+       slak    %r0,%r0,-524288
+       slak    %r0,%r0,-1
+       slak    %r0,%r0,1
+       slak    %r0,%r0,524287
+       slak    %r0,%r0,0(%r1)
+       slak    %r0,%r0,0(%r15)
+       slak    %r0,%r0,524287(%r1)
+       slak    %r0,%r0,524287(%r15)
+
 #CHECK: slgrk  %r0, %r0, %r0           # encoding: [0xb9,0xeb,0x00,0x00]
 #CHECK: slgrk  %r0, %r0, %r15          # encoding: [0xb9,0xeb,0xf0,0x00]
 #CHECK: slgrk  %r0, %r15, %r0          # encoding: [0xb9,0xeb,0x00,0x0f]

diff --git a/test/MC/SystemZ/insn-good.s b/test/MC/SystemZ/insn-good.s
index 9a0f02fa6b04e1d31aa2c3948354443912ff45c7..ffc86bcf5ecaea1e76165cfe2b43c41a247b26bd 100644 (file)
--- a/test/MC/SystemZ/insn-good.s
+++ b/test/MC/SystemZ/insn-good.s
@@ -5326,6 +5326,59 @@
        ear     %r7, %a8
        ear     %r15, %a15
 
+#CHECK: ex     %r0, 0                  # encoding: [0x44,0x00,0x00,0x00]
+#CHECK: ex     %r0, 4095               # encoding: [0x44,0x00,0x0f,0xff]
+#CHECK: ex     %r0, 0(%r1)             # encoding: [0x44,0x00,0x10,0x00]
+#CHECK: ex     %r0, 0(%r15)            # encoding: [0x44,0x00,0xf0,0x00]
+#CHECK: ex     %r0, 4095(%r1,%r15)     # encoding: [0x44,0x01,0xff,0xff]
+#CHECK: ex     %r0, 4095(%r15,%r1)     # encoding: [0x44,0x0f,0x1f,0xff]
+#CHECK: ex     %r15, 0                 # encoding: [0x44,0xf0,0x00,0x00]
+
+       ex      %r0, 0
+       ex      %r0, 4095
+       ex      %r0, 0(%r1)
+       ex      %r0, 0(%r15)
+       ex      %r0, 4095(%r1,%r15)
+       ex      %r0, 4095(%r15,%r1)
+       ex      %r15, 0
+
+#CHECK: exrl   %r0, .[[LAB:L.*]]-4294967296 # encoding: [0xc6,0x00,A,A,A,A]
+#CHECK:  fixup A - offset: 2, value: (.[[LAB]]-4294967296)+2, kind: FK_390_PC32DBL
+       exrl    %r0, -0x100000000
+#CHECK: exrl   %r0, .[[LAB:L.*]]-2     # encoding: [0xc6,0x00,A,A,A,A]
+#CHECK:  fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC32DBL
+       exrl    %r0, -2
+#CHECK: exrl   %r0, .[[LAB:L.*]]       # encoding: [0xc6,0x00,A,A,A,A]
+#CHECK:  fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC32DBL
+       exrl    %r0, 0
+#CHECK: exrl   %r0, .[[LAB:L.*]]+4294967294 # encoding: [0xc6,0x00,A,A,A,A]
+#CHECK:  fixup A - offset: 2, value: (.[[LAB]]+4294967294)+2, kind: FK_390_PC32DBL
+       exrl    %r0, 0xfffffffe
+
+#CHECK: exrl   %r0, foo                # encoding: [0xc6,0x00,A,A,A,A]
+# fixup A - offset: 2, value: foo+2, kind: FK_390_PC32DBL
+#CHECK: exrl   %r15, foo               # encoding: [0xc6,0xf0,A,A,A,A]
+# fixup A - offset: 2, value: foo+2, kind: FK_390_PC32DBL
+
+       exrl    %r0,foo
+       exrl    %r15,foo
+
+#CHECK: exrl   %r3, bar+100            # encoding: [0xc6,0x30,A,A,A,A]
+# fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC32DBL
+#CHECK: exrl   %r4, bar+100            # encoding: [0xc6,0x40,A,A,A,A]
+# fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC32DBL
+
+       exrl    %r3,bar+100
+       exrl    %r4,bar+100
+
+#CHECK: exrl   %r7, frob@PLT           # encoding: [0xc6,0x70,A,A,A,A]
+# fixup A - offset: 2, value: frob@PLT+2, kind: FK_390_PC32DBL
+#CHECK: exrl   %r8, frob@PLT           # encoding: [0xc6,0x80,A,A,A,A]
+# fixup A - offset: 2, value: frob@PLT+2, kind: FK_390_PC32DBL
+
+       exrl    %r7,frob@PLT
+       exrl    %r8,frob@PLT
+
 #CHECK: fidbr  %f0, 0, %f0             # encoding: [0xb3,0x5f,0x00,0x00]
 #CHECK: fidbr  %f0, 0, %f15            # encoding: [0xb3,0x5f,0x00,0x0f]
 #CHECK: fidbr  %f0, 15, %f0            # encoding: [0xb3,0x5f,0xf0,0x00]
@@ -5388,6 +5441,66 @@
        ic      %r0, 4095(%r15,%r1)
        ic      %r15, 0
 
+#CHECK: icm    %r0, 0, 0               # encoding: [0xbf,0x00,0x00,0x00]
+#CHECK: icm    %r0, 15, 4095           # encoding: [0xbf,0x0f,0x0f,0xff]
+#CHECK: icm    %r0, 0, 0(%r1)          # encoding: [0xbf,0x00,0x10,0x00]
+#CHECK: icm    %r0, 0, 0(%r15)         # encoding: [0xbf,0x00,0xf0,0x00]
+#CHECK: icm    %r15, 15, 4095(%r1)     # encoding: [0xbf,0xff,0x1f,0xff]
+#CHECK: icm    %r0, 0, 4095(%r15)      # encoding: [0xbf,0x00,0xff,0xff]
+#CHECK: icm    %r15, 0, 0              # encoding: [0xbf,0xf0,0x00,0x00]
+
+       icm     %r0, 0, 0
+       icm     %r0, 15, 4095
+       icm     %r0, 0, 0(%r1)
+       icm     %r0, 0, 0(%r15)
+       icm     %r15, 15, 4095(%r1)
+       icm     %r0, 0, 4095(%r15)
+       icm     %r15, 0, 0
+
+#CHECK: icmh   %r0, 0, -524288            # encoding: [0xeb,0x00,0x00,0x00,0x80,0x80]
+#CHECK: icmh   %r0, 0, -1                 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x80]
+#CHECK: icmh   %r0, 15, 0                 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x80]
+#CHECK: icmh   %r0, 15, 1                 # encoding: [0xeb,0x0f,0x00,0x01,0x00,0x80]
+#CHECK: icmh   %r0, 8, 524287             # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x80]
+#CHECK: icmh   %r0, 8, 0(%r1)             # encoding: [0xeb,0x08,0x10,0x00,0x00,0x80]
+#CHECK: icmh   %r0, 4, 0(%r15)            # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x80]
+#CHECK: icmh   %r0, 4, 524287(%r15)       # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x80]
+#CHECK: icmh   %r0, 0, 524287(%r1)        # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x80]
+#CHECK: icmh   %r15, 0, 0                 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0x80]
+
+       icmh    %r0, 0, -524288
+       icmh    %r0, 0, -1
+       icmh    %r0, 15, 0
+       icmh    %r0, 15, 1
+       icmh    %r0, 8, 524287
+       icmh    %r0, 8, 0(%r1)
+       icmh    %r0, 4, 0(%r15)
+       icmh    %r0, 4, 524287(%r15)
+       icmh    %r0, 0, 524287(%r1)
+       icmh    %r15, 0, 0
+
+#CHECK: icmy   %r0, 0, -524288            # encoding: [0xeb,0x00,0x00,0x00,0x80,0x81]
+#CHECK: icmy   %r0, 0, -1                 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x81]
+#CHECK: icmy   %r0, 15, 0                 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x81]
+#CHECK: icmy   %r0, 15, 1                 # encoding: [0xeb,0x0f,0x00,0x01,0x00,0x81]
+#CHECK: icmy   %r0, 8, 524287             # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x81]
+#CHECK: icmy   %r0, 8, 0(%r1)             # encoding: [0xeb,0x08,0x10,0x00,0x00,0x81]
+#CHECK: icmy   %r0, 4, 0(%r15)            # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x81]
+#CHECK: icmy   %r0, 4, 524287(%r15)       # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x81]
+#CHECK: icmy   %r0, 0, 524287(%r1)        # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x81]
+#CHECK: icmy   %r15, 0, 0                 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0x81]
+
+       icmy    %r0, 0, -524288
+       icmy    %r0, 0, -1
+       icmy    %r0, 15, 0
+       icmy    %r0, 15, 1
+       icmy    %r0, 8, 524287
+       icmy    %r0, 8, 0(%r1)
+       icmy    %r0, 4, 0(%r15)
+       icmy    %r0, 4, 524287(%r15)
+       icmy    %r0, 0, 524287(%r1)
+       icmy    %r15, 0, 0
+
 #CHECK: icy    %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x73]
 #CHECK: icy    %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x73]
 #CHECK: icy    %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x73]
@@ -6516,6 +6629,28 @@
        llill   %r0, 0xffff
        llill   %r15, 0
 
+#CHECK: lm     %r0, %r0, 0             # encoding: [0x98,0x00,0x00,0x00]
+#CHECK: lm     %r0, %r15, 0            # encoding: [0x98,0x0f,0x00,0x00]
+#CHECK: lm     %r14, %r15, 0           # encoding: [0x98,0xef,0x00,0x00]
+#CHECK: lm     %r15, %r15, 0           # encoding: [0x98,0xff,0x00,0x00]
+#CHECK: lm     %r0, %r0, 4095          # encoding: [0x98,0x00,0x0f,0xff]
+#CHECK: lm     %r0, %r0, 1             # encoding: [0x98,0x00,0x00,0x01]
+#CHECK: lm     %r0, %r0, 0(%r1)        # encoding: [0x98,0x00,0x10,0x00]
+#CHECK: lm     %r0, %r0, 0(%r15)       # encoding: [0x98,0x00,0xf0,0x00]
+#CHECK: lm     %r0, %r0, 4095(%r1)     # encoding: [0x98,0x00,0x1f,0xff]
+#CHECK: lm     %r0, %r0, 4095(%r15)    # encoding: [0x98,0x00,0xff,0xff]
+
+       lm      %r0,%r0,0
+       lm      %r0,%r15,0
+       lm      %r14,%r15,0
+       lm      %r15,%r15,0
+       lm      %r0,%r0,4095
+       lm      %r0,%r0,1
+       lm      %r0,%r0,0(%r1)
+       lm      %r0,%r0,0(%r15)
+       lm      %r0,%r0,4095(%r1)
+       lm      %r0,%r0,4095(%r15)
+
 #CHECK: lmg    %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x04]
 #CHECK: lmg    %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x04]
 #CHECK: lmg    %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x04]
@@ -6544,6 +6679,62 @@
        lmg     %r0,%r0,524287(%r1)
        lmg     %r0,%r0,524287(%r15)
 
+#CHECK: lmh    %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x96]
+#CHECK: lmh    %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x96]
+#CHECK: lmh    %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x96]
+#CHECK: lmh    %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x96]
+#CHECK: lmh    %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x96]
+#CHECK: lmh    %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x96]
+#CHECK: lmh    %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x96]
+#CHECK: lmh    %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x96]
+#CHECK: lmh    %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x96]
+#CHECK: lmh    %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x96]
+#CHECK: lmh    %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x96]
+#CHECK: lmh    %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x96]
+#CHECK: lmh    %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x96]
+
+       lmh     %r0,%r0,0
+       lmh     %r0,%r15,0
+       lmh     %r14,%r15,0
+       lmh     %r15,%r15,0
+       lmh     %r0,%r0,-524288
+       lmh     %r0,%r0,-1
+       lmh     %r0,%r0,0
+       lmh     %r0,%r0,1
+       lmh     %r0,%r0,524287
+       lmh     %r0,%r0,0(%r1)
+       lmh     %r0,%r0,0(%r15)
+       lmh     %r0,%r0,524287(%r1)
+       lmh     %r0,%r0,524287(%r15)
+
+#CHECK: lmy    %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x98]
+#CHECK: lmy    %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x98]
+#CHECK: lmy    %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x98]
+#CHECK: lmy    %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x98]
+#CHECK: lmy    %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x98]
+#CHECK: lmy    %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x98]
+#CHECK: lmy    %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x98]
+#CHECK: lmy    %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x98]
+#CHECK: lmy    %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x98]
+#CHECK: lmy    %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x98]
+#CHECK: lmy    %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x98]
+#CHECK: lmy    %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x98]
+#CHECK: lmy    %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x98]
+
+       lmy     %r0,%r0,0
+       lmy     %r0,%r15,0
+       lmy     %r14,%r15,0
+       lmy     %r15,%r15,0
+       lmy     %r0,%r0,-524288
+       lmy     %r0,%r0,-1
+       lmy     %r0,%r0,0
+       lmy     %r0,%r0,1
+       lmy     %r0,%r0,524287
+       lmy     %r0,%r0,0(%r1)
+       lmy     %r0,%r0,0(%r15)
+       lmy     %r0,%r0,524287(%r1)
+       lmy     %r0,%r0,524287(%r15)
+
 #CHECK: lndbr  %f0, %f9                # encoding: [0xb3,0x11,0x00,0x09]
 #CHECK: lndbr  %f0, %f15               # encoding: [0xb3,0x11,0x00,0x0f]
 #CHECK: lndbr  %f15, %f0               # encoding: [0xb3,0x11,0x00,0xf0]
@@ -8528,6 +8719,24 @@
        slgr    %r15,%r0
        slgr    %r7,%r8
 
+#CHECK: sla    %r0, 0                  # encoding: [0x8b,0x00,0x00,0x00]
+#CHECK: sla    %r7, 0                  # encoding: [0x8b,0x70,0x00,0x00]
+#CHECK: sla    %r15, 0                 # encoding: [0x8b,0xf0,0x00,0x00]
+#CHECK: sla    %r0, 4095               # encoding: [0x8b,0x00,0x0f,0xff]
+#CHECK: sla    %r0, 0(%r1)             # encoding: [0x8b,0x00,0x10,0x00]
+#CHECK: sla    %r0, 0(%r15)            # encoding: [0x8b,0x00,0xf0,0x00]
+#CHECK: sla    %r0, 4095(%r1)          # encoding: [0x8b,0x00,0x1f,0xff]
+#CHECK: sla    %r0, 4095(%r15)         # encoding: [0x8b,0x00,0xff,0xff]
+
+       sla     %r0,0
+       sla     %r7,0
+       sla     %r15,0
+       sla     %r0,4095
+       sla     %r0,0(%r1)
+       sla     %r0,0(%r15)
+       sla     %r0,4095(%r1)
+       sla     %r0,4095(%r15)
+
 #CHECK: sll    %r0, 0                  # encoding: [0x89,0x00,0x00,0x00]
 #CHECK: sll    %r7, 0                  # encoding: [0x89,0x70,0x00,0x00]
 #CHECK: sll    %r15, 0                 # encoding: [0x89,0xf0,0x00,0x00]
@@ -9094,6 +9303,28 @@
        sthy    %r0, 524287(%r15,%r1)
        sthy    %r15, 0
 
+#CHECK: stm    %r0, %r0, 0             # encoding: [0x90,0x00,0x00,0x00]
+#CHECK: stm    %r0, %r15, 0            # encoding: [0x90,0x0f,0x00,0x00]
+#CHECK: stm    %r14, %r15, 0           # encoding: [0x90,0xef,0x00,0x00]
+#CHECK: stm    %r15, %r15, 0           # encoding: [0x90,0xff,0x00,0x00]
+#CHECK: stm    %r0, %r0, 4095          # encoding: [0x90,0x00,0x0f,0xff]
+#CHECK: stm    %r0, %r0, 1             # encoding: [0x90,0x00,0x00,0x01]
+#CHECK: stm    %r0, %r0, 0(%r1)        # encoding: [0x90,0x00,0x10,0x00]
+#CHECK: stm    %r0, %r0, 0(%r15)       # encoding: [0x90,0x00,0xf0,0x00]
+#CHECK: stm    %r0, %r0, 4095(%r1)     # encoding: [0x90,0x00,0x1f,0xff]
+#CHECK: stm    %r0, %r0, 4095(%r15)    # encoding: [0x90,0x00,0xff,0xff]
+
+       stm     %r0,%r0,0
+       stm     %r0,%r15,0
+       stm     %r14,%r15,0
+       stm     %r15,%r15,0
+       stm     %r0,%r0,4095
+       stm     %r0,%r0,1
+       stm     %r0,%r0,0(%r1)
+       stm     %r0,%r0,0(%r15)
+       stm     %r0,%r0,4095(%r1)
+       stm     %r0,%r0,4095(%r15)
+
 #CHECK: stmg   %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x24]
 #CHECK: stmg   %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x24]
 #CHECK: stmg   %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x24]
@@ -9122,6 +9353,62 @@
        stmg    %r0,%r0,524287(%r1)
        stmg    %r0,%r0,524287(%r15)
 
+#CHECK: stmh   %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x26]
+#CHECK: stmh   %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x26]
+#CHECK: stmh   %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x26]
+#CHECK: stmh   %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x26]
+#CHECK: stmh   %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x26]
+#CHECK: stmh   %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x26]
+#CHECK: stmh   %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x26]
+#CHECK: stmh   %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x26]
+#CHECK: stmh   %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x26]
+#CHECK: stmh   %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x26]
+#CHECK: stmh   %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x26]
+#CHECK: stmh   %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x26]
+#CHECK: stmh   %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x26]
+
+       stmh    %r0,%r0,0
+       stmh    %r0,%r15,0
+       stmh    %r14,%r15,0
+       stmh    %r15,%r15,0
+       stmh    %r0,%r0,-524288
+       stmh    %r0,%r0,-1
+       stmh    %r0,%r0,0
+       stmh    %r0,%r0,1
+       stmh    %r0,%r0,524287
+       stmh    %r0,%r0,0(%r1)
+       stmh    %r0,%r0,0(%r15)
+       stmh    %r0,%r0,524287(%r1)
+       stmh    %r0,%r0,524287(%r15)
+
+#CHECK: stmy   %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x90]
+#CHECK: stmy   %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x90]
+#CHECK: stmy   %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x90]
+#CHECK: stmy   %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x90]
+#CHECK: stmy   %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x90]
+#CHECK: stmy   %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x90]
+#CHECK: stmy   %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x90]
+#CHECK: stmy   %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x90]
+#CHECK: stmy   %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x90]
+#CHECK: stmy   %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x90]
+#CHECK: stmy   %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x90]
+#CHECK: stmy   %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x90]
+#CHECK: stmy   %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x90]
+
+       stmy    %r0,%r0,0
+       stmy    %r0,%r15,0
+       stmy    %r14,%r15,0
+       stmy    %r15,%r15,0
+       stmy    %r0,%r0,-524288
+       stmy    %r0,%r0,-1
+       stmy    %r0,%r0,0
+       stmy    %r0,%r0,1
+       stmy    %r0,%r0,524287
+       stmy    %r0,%r0,0(%r1)
+       stmy    %r0,%r0,0(%r15)
+       stmy    %r0,%r0,524287(%r1)
+       stmy    %r0,%r0,524287(%r15)
+
 #CHECK: strl   %r0, .[[LAB:L.*]]-4294967296 # encoding: [0xc4,0x0f,A,A,A,A]
 #CHECK:  fixup A - offset: 2, value: (.[[LAB]]-4294967296)+2, kind: FK_390_PC32DBL
        strl    %r0, -0x100000000
@@ -9373,6 +9660,16 @@
        tmhl    %r0, 0xffff
        tmhl    %r15, 0
 
+#CHECK: tmlh   %r0, 0                  # encoding: [0xa7,0x00,0x00,0x00]
+#CHECK: tmlh   %r0, 32768              # encoding: [0xa7,0x00,0x80,0x00]
+#CHECK: tmlh   %r0, 65535              # encoding: [0xa7,0x00,0xff,0xff]
+#CHECK: tmlh   %r15, 0                 # encoding: [0xa7,0xf0,0x00,0x00]
+
+       tmh     %r0, 0
+       tmh     %r0, 0x8000
+       tmh     %r0, 0xffff
+       tmh     %r15, 0
+
 #CHECK: tmlh   %r0, 0                  # encoding: [0xa7,0x00,0x00,0x00]
 #CHECK: tmlh   %r0, 32768              # encoding: [0xa7,0x00,0x80,0x00]
 #CHECK: tmlh   %r0, 65535              # encoding: [0xa7,0x00,0xff,0xff]
@@ -9383,6 +9680,16 @@
        tmlh    %r0, 0xffff
        tmlh    %r15, 0
 
+#CHECK: tmll   %r0, 0                  # encoding: [0xa7,0x01,0x00,0x00]
+#CHECK: tmll   %r0, 32768              # encoding: [0xa7,0x01,0x80,0x00]
+#CHECK: tmll   %r0, 65535              # encoding: [0xa7,0x01,0xff,0xff]
+#CHECK: tmll   %r15, 0                 # encoding: [0xa7,0xf1,0x00,0x00]
+
+       tml     %r0, 0
+       tml     %r0, 0x8000
+       tml     %r0, 0xffff
+       tml     %r15, 0
+
 #CHECK: tmll   %r0, 0                  # encoding: [0xa7,0x01,0x00,0x00]
 #CHECK: tmll   %r0, 32768              # encoding: [0xa7,0x01,0x80,0x00]
 #CHECK: tmll   %r0, 65535              # encoding: [0xa7,0x01,0xff,0xff]