]> granicus.if.org Git - clang/commitdiff
[DebugInfo] Avoid name conflict of generated VLA expression variable.
authorSander de Smalen <sander.desmalen@arm.com>
Tue, 13 Feb 2018 07:49:34 +0000 (07:49 +0000)
committerSander de Smalen <sander.desmalen@arm.com>
Tue, 13 Feb 2018 07:49:34 +0000 (07:49 +0000)
Summary:
This patch also adds the 'DW_AT_artificial' flag to the generated variable.

Addresses the issues mentioned in http://llvm.org/PR30553.

Reviewers: CarlosAlbertoEnciso, probinson, aprantl

Reviewed By: aprantl

Subscribers: JDevlieghere, cfe-commits

Differential Revision: https://reviews.llvm.org/D43189

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@324988 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/CGDecl.cpp
test/CodeGen/debug-info-vla.c
test/CodeGenCXX/debug-info-vla.cpp
test/OpenMP/target_codegen.cpp
test/OpenMP/target_parallel_codegen.cpp
test/OpenMP/target_parallel_for_codegen.cpp
test/OpenMP/target_parallel_for_simd_codegen.cpp
test/OpenMP/target_simd_codegen.cpp
test/OpenMP/target_teams_codegen.cpp
test/OpenMP/target_teams_distribute_codegen.cpp
test/OpenMP/target_teams_distribute_simd_codegen.cpp

index d6d144d84889e18359302d1c20ea5b49c18cc0d9..c036cd414e40eb9bfb470030e6beb672bb911c5c 100644 (file)
@@ -969,8 +969,8 @@ void CodeGenFunction::EmitAndRegisterVariableArrayDimensions(
     if (auto *C = dyn_cast<llvm::ConstantInt>(VlaSize.NumElts))
       Dimensions.emplace_back(C, Type1D.getUnqualifiedType());
     else {
-      auto SizeExprAddr =
-          CreateDefaultAlignTempAlloca(VlaSize.NumElts->getType(), "vla_expr");
+      auto SizeExprAddr = CreateDefaultAlignTempAlloca(
+          VlaSize.NumElts->getType(), "__vla_expr");
       Builder.CreateStore(VlaSize.NumElts, SizeExprAddr);
       Dimensions.emplace_back(SizeExprAddr.getPointer(),
                               Type1D.getUnqualifiedType());
@@ -999,6 +999,7 @@ void CodeGenFunction::EmitAndRegisterVariableArrayDimensions(
           getContext(), const_cast<DeclContext *>(D.getDeclContext()),
           D.getLocation(), D.getLocation(), &NameIdent, QT,
           getContext().CreateTypeSourceInfo(QT), SC_Auto);
+      ArtificialDecl->setImplicit();
 
       MD = DI->EmitDeclareOfAutoVariable(ArtificialDecl, VlaSize.NumElts,
                                          Builder);
index 35a219b955a5d6fe21b7df66ff2118b4d560b503..8bd6a6d0acbe9a63fc23845305bb4aade47fffe9 100644 (file)
@@ -2,9 +2,9 @@
 
 void testVLAwithSize(int s)
 {
-// CHECK-DAG: dbg.declare({{.*}} %vla_expr, metadata ![[VLAEXPR:[0-9]+]]
+// CHECK-DAG: dbg.declare({{.*}} %__vla_expr, metadata ![[VLAEXPR:[0-9]+]]
 // CHECK-DAG: dbg.declare({{.*}} %vla, metadata ![[VAR:[0-9]+]]
-// CHECK-DAG: ![[VLAEXPR]] = !DILocalVariable(name: "vla_expr"
+// CHECK-DAG: ![[VLAEXPR]] = !DILocalVariable(name: "__vla_expr", {{.*}} flags: DIFlagArtificial
 // CHECK-DAG: ![[VAR]] = !DILocalVariable(name: "vla",{{.*}} line: [[@LINE+2]]
 // CHECK-DAG: !DISubrange(count: ![[VLAEXPR]])
   int vla[s];
index 76318e331f754a8a5ce76127443b8ba6cf3d8828..6c35f301f968e31b32ecf815dd66246ea2ed32e4 100644 (file)
@@ -13,7 +13,7 @@ int (*fp)(int[][*]) = nullptr;
 // CHECK: [[ELEM_TYPE]] = !{[[NOCOUNT:.*]]}
 // CHECK: [[NOCOUNT]] = !DISubrange(count: -1)
 //
-// CHECK: [[VAR:![0-9]+]] = !DILocalVariable(name: "vla_expr"
+// CHECK: [[VAR:![0-9]+]] = !DILocalVariable(name: "__vla_expr", {{.*}}flags: DIFlagArtificial
 // CHECK: !DICompositeType(tag: DW_TAG_array_type,
 // CHECK-NOT:                               size:
 // CHECK-SAME:                              elements: [[ELEM_TYPE:![0-9]+]]
index 351929043830aa9acdf1f6cb1685fd99e28a7ed0..2c0dfd8cf7cf5ebd808ef0fea0a6ab0584de8bef 100644 (file)
@@ -511,7 +511,7 @@ int bar(int n){
 // CHECK-64:       store i32 %{{.+}}, i32* [[B_ADDR]],
 // CHECK-64:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]],
 
-// CHECK-32:       store i32 %{{.+}}, i32* %vla_expr
+// CHECK-32:       store i32 %{{.+}}, i32* %__vla_expr
 // CHECK-32:       store i32 %{{.+}}, i32* [[B_ADDR:%.+]],
 // CHECK-32:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],
 
index 7270bf7fdfd0c72325ca9b5439cef423689f6a1c..0cead4509af91c6c012782091924c8d65379f4e9 100644 (file)
@@ -528,7 +528,7 @@ int bar(int n){
 // CHECK-64:       store i32 %{{.+}}, i32* [[B_ADDR]],
 // CHECK-64:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]],
 
-// CHECK-32:       store i32 %{{.+}}, i32* %vla_expr
+// CHECK-32:       store i32 %{{.+}}, i32* %__vla_expr
 // CHECK-32:       store i32 %{{.+}}, i32* [[B_ADDR:%.+]],
 // CHECK-32:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],
 
index 73cc8b42fbc14e89c4a984013be962ea907521b7..4b6254de070abd42feefe32258c5d8a3ced29faf 100644 (file)
@@ -555,7 +555,7 @@ int bar(int n){
 // CHECK-64:       store i32 %{{.+}}, i32* [[B_ADDR]],
 // CHECK-64:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]],
 
-// CHECK-32:       store i32 %{{.+}}, i32* %vla_expr
+// CHECK-32:       store i32 %{{.+}}, i32* %__vla_expr
 // CHECK-32:       store i32 %{{.+}}, i32* [[B_ADDR:%.+]],
 // CHECK-32:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],
 
index 0f49261eb1d1928cd1a7513ff029dd3684ef859d..39e10fe29d041ce845522d52c64cfb94db3841fd 100644 (file)
@@ -555,7 +555,7 @@ int bar(int n){
 // CHECK-64:       store i32 %{{.+}}, i32* [[B_ADDR]],
 // CHECK-64:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]],
 
-// CHECK-32:       store i32 %{{.+}}, i32* %vla_expr
+// CHECK-32:       store i32 %{{.+}}, i32* %__vla_expr
 // CHECK-32:       store i32 %{{.+}}, i32* [[B_ADDR:%.+]],
 // CHECK-32:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],
 
index 074ecb263292374d8a97365a82b1957904e9c6de..ad94def10d9dd73f02f63d633c795738bee232ab 100644 (file)
@@ -478,7 +478,7 @@ int bar(int n){
 // CHECK-64:       store i32 %{{.+}}, i32* [[B_ADDR]],
 // CHECK-64:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]],
 
-// CHECK-32:       store i32 %{{.+}}, i32* %vla_expr
+// CHECK-32:       store i32 %{{.+}}, i32* %__vla_expr
 // CHECK-32:       store i32 %{{.+}}, i32* [[B_ADDR:%.+]],
 // CHECK-32:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],
 
index 1d6385b9c1f5c0a1afcdfa008790f7b7eac2c4c8..f77c6714d685e9e30863b756ef3ea6aeb13185fe 100644 (file)
@@ -553,7 +553,7 @@ int bar(int n){
 // CHECK-64:       store i32 %{{.+}}, i32* [[B_ADDR]],
 // CHECK-64:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]],
 
-// CHECK-32:       store i32 %{{.+}}, i32* %vla_expr
+// CHECK-32:       store i32 %{{.+}}, i32* %__vla_expr
 // CHECK-32:       store i32 %{{.+}}, i32* [[B_ADDR:%.+]],
 // CHECK-32:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],
 
index cc12d40f5c87d09b33c9dbac39fe71eb9d894bd2..6605cbd6f205a7ee33ee3de8a3517aabc1447abd 100644 (file)
@@ -564,7 +564,7 @@ int bar(int n){
 // CHECK-64:       store i32 %{{.+}}, i32* [[B_ADDR]],
 // CHECK-64:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]],
 
-// CHECK-32:       store i32 %{{.+}}, i32* %vla_expr
+// CHECK-32:       store i32 %{{.+}}, i32* %__vla_expr
 // CHECK-32:       store i32 %{{.+}}, i32* [[B_ADDR:%.+]],
 // CHECK-32:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],
 
index 695f3863081119f5e02f13f31558e95b83f66491..fb33cc90d3f655a4df88618b9f4169f039082d28 100644 (file)
@@ -553,7 +553,7 @@ int bar(int n){
 // CHECK-64:       store i32 %{{.+}}, i32* [[B_ADDR]],
 // CHECK-64:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]],
 
-// CHECK-32:       store i32 %{{.+}}, i32* %vla_expr
+// CHECK-32:       store i32 %{{.+}}, i32* %__vla_expr
 // CHECK-32:       store i32 %{{.+}}, i32* [[B_ADDR:%.+]],
 // CHECK-32:       [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],