Use an actual valid register in test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292459 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/AArch64/regcoal-physreg.mir b/test/CodeGen/AArch64/regcoal-physreg.mir
index a94613e58a837f6e17f76d45f45236f74718e97c..4bcabd10088abe241e99c257e77783c498063736 100644 (file)
--- a/test/CodeGen/AArch64/regcoal-physreg.mir
+++ b/test/CodeGen/AArch64/regcoal-physreg.mir
@@ -63,9 +63,9 @@ body: |
     ; Only coalesce when the source register is reserved as a whole (this is
     ; a limitation of the current code which cannot update liveness information
     ; of the non-reserved part).
-    ; CHECK: %6 = COPY %xzr_x0
+    ; CHECK: %6 = COPY %x28_fp
     ; CHECK: HINT 0, implicit %6
-    %6 = COPY %xzr_x0
+    %6 = COPY %x28_fp
     HINT 0, implicit %6
 
     ; It is not fine to coalesce copies from reserved physregs when they are