]> granicus.if.org Git - llvm/commitdiff
[X86] Tag SALC instructions scheduler class
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 7 Dec 2017 16:07:06 +0000 (16:07 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 7 Dec 2017 16:07:06 +0000 (16:07 +0000)
Treat these the same as LAHF/SAHF (although its not a x86_64 instruction)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320055 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstrCMovSetCC.td
test/CodeGen/X86/schedule-x86_32.ll

index b85abfb9ca7f3b18e395ab49edf1ace6d5ac9928..8dd5e1c0626bc60fdcff08ddb3f0cc668d30cd56 100644 (file)
@@ -113,6 +113,6 @@ defm SETG  : SETCC<0x9F, "setg",  X86_COND_G>;   // signed greater than
 // SALC is an undocumented instruction. Information for this instruction can be found
 // here http://www.rcollins.org/secrets/opcodes/SALC.html
 // Set AL if carry. 
-let Uses = [EFLAGS], Defs = [AL] in {
-  def SALC : I<0xD6, RawFrm, (outs), (ins), "salc", []>, Requires<[Not64BitMode]>;
+let Uses = [EFLAGS], Defs = [AL], SchedRW = [WriteALU] in {
+  def SALC : I<0xD6, RawFrm, (outs), (ins), "salc", [], IIC_AHF>, Requires<[Not64BitMode]>;
 }
index e950dc30dbb9e07138ea69466ca81e6762822bf4..9a8d1eff0c38f14a98f24a698bb0dbdf86f3923e 100644 (file)
@@ -528,63 +528,63 @@ define i8 @test_salc() optsize {
 ; ATOM-LABEL: test_salc:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    #APP
-; ATOM-NEXT:    salc
+; ATOM-NEXT:    salc # sched: [1:0.50]
 ; ATOM-NEXT:    #NO_APP
 ; ATOM-NEXT:    retl # sched: [79:39.50]
 ;
 ; SLM-LABEL: test_salc:
 ; SLM:       # %bb.0:
 ; SLM-NEXT:    #APP
-; SLM-NEXT:    salc
+; SLM-NEXT:    salc # sched: [1:0.50]
 ; SLM-NEXT:    #NO_APP
 ; SLM-NEXT:    retl # sched: [4:1.00]
 ;
 ; SANDY-LABEL: test_salc:
 ; SANDY:       # %bb.0:
 ; SANDY-NEXT:    #APP
-; SANDY-NEXT:    salc
+; SANDY-NEXT:    salc # sched: [1:0.33]
 ; SANDY-NEXT:    #NO_APP
 ; SANDY-NEXT:    retl # sched: [5:1.00]
 ;
 ; HASWELL-LABEL: test_salc:
 ; HASWELL:       # %bb.0:
 ; HASWELL-NEXT:    #APP
-; HASWELL-NEXT:    salc
+; HASWELL-NEXT:    salc # sched: [1:0.25]
 ; HASWELL-NEXT:    #NO_APP
 ; HASWELL-NEXT:    retl # sched: [5:0.50]
 ;
 ; BROADWELL-LABEL: test_salc:
 ; BROADWELL:       # %bb.0:
 ; BROADWELL-NEXT:    #APP
-; BROADWELL-NEXT:    salc
+; BROADWELL-NEXT:    salc # sched: [1:0.25]
 ; BROADWELL-NEXT:    #NO_APP
 ; BROADWELL-NEXT:    retl # sched: [6:0.50]
 ;
 ; SKYLAKE-LABEL: test_salc:
 ; SKYLAKE:       # %bb.0:
 ; SKYLAKE-NEXT:    #APP
-; SKYLAKE-NEXT:    salc
+; SKYLAKE-NEXT:    salc # sched: [1:0.25]
 ; SKYLAKE-NEXT:    #NO_APP
 ; SKYLAKE-NEXT:    retl # sched: [6:0.50]
 ;
 ; SKX-LABEL: test_salc:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    #APP
-; SKX-NEXT:    salc
+; SKX-NEXT:    salc # sched: [1:0.25]
 ; SKX-NEXT:    #NO_APP
 ; SKX-NEXT:    retl # sched: [6:0.50]
 ;
 ; BTVER2-LABEL: test_salc:
 ; BTVER2:       # %bb.0:
 ; BTVER2-NEXT:    #APP
-; BTVER2-NEXT:    salc
+; BTVER2-NEXT:    salc # sched: [1:0.50]
 ; BTVER2-NEXT:    #NO_APP
 ; BTVER2-NEXT:    retl # sched: [4:1.00]
 ;
 ; ZNVER1-LABEL: test_salc:
 ; ZNVER1:       # %bb.0:
 ; ZNVER1-NEXT:    #APP
-; ZNVER1-NEXT:    salc
+; ZNVER1-NEXT:    salc # sched: [1:0.25]
 ; ZNVER1-NEXT:    #NO_APP
 ; ZNVER1-NEXT:    retl # sched: [1:0.50]
   %1 = tail call i8 asm "salc", "=r"() nounwind