Fix the names of the v[r]addhn and v[r]subhn Neon intrinsics.

Their suffixes are supposed to reflect the source operand element type,
not the destination element type.  Radar 8746481.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121392 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/clang/Basic/arm_neon.td b/include/clang/Basic/arm_neon.td
index a9060518eb8e17e6ecde8e812d693264f73ef237..a241b68c69d30a300966c5caa9c8c5771ee41b72 100644 (file)
--- a/include/clang/Basic/arm_neon.td
+++ b/include/clang/Basic/arm_neon.td
@@ -129,8 +129,8 @@ def VADDW   : Inst<"vaddw", "wwd", "csiUcUsUi", OP_ADDW>;
 def VHADD   : SInst<"vhadd", "ddd", "csiUcUsUiQcQsQiQUcQUsQUi">;
 def VRHADD  : SInst<"vrhadd", "ddd", "csiUcUsUiQcQsQiQUcQUsQUi">;
 def VQADD   : SInst<"vqadd", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
-def VADDHN  : IInst<"vaddhn", "dww", "csiUcUsUi">;
-def VRADDHN : IInst<"vraddhn", "dww", "csiUcUsUi">;
+def VADDHN  : IInst<"vaddhn", "hkk", "silUsUiUl">;
+def VRADDHN : IInst<"vraddhn", "hkk", "silUsUiUl">;
 
 ////////////////////////////////////////////////////////////////////////////////
 // E.3.2 Multiplication
@@ -155,8 +155,8 @@ def VSUBL   : Inst<"vsubl", "wdd", "csiUcUsUi", OP_SUBL>;
 def VSUBW   : Inst<"vsubw", "wwd", "csiUcUsUi", OP_SUBW>;
 def VQSUB   : SInst<"vqsub", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
 def VHSUB   : SInst<"vhsub", "ddd", "csiUcUsUiQcQsQiQUcQUsQUi">;
-def VSUBHN  : IInst<"vsubhn", "dww", "csiUcUsUi">;
-def VRSUBHN : IInst<"vrsubhn", "dww", "csiUcUsUi">;
+def VSUBHN  : IInst<"vsubhn", "hkk", "silUsUiUl">;
+def VRSUBHN : IInst<"vrsubhn", "hkk", "silUsUiUl">;
 
 ////////////////////////////////////////////////////////////////////////////////
 // E.3.4 Comparison