[X86] Remove unnecessary COPY_TO_REGCLASS(VR128) from the output patterns for FMA...

The instructions are already defined as writing a VR128 register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312308 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrFMA.td b/lib/Target/X86/X86InstrFMA.td
index ee0cc54765adceb2cf0ea350115ce2d8414a5b66..9e554db918c64c8f1487582678ab036e695b4de4 100644 (file)
--- a/lib/Target/X86/X86InstrFMA.td
+++ b/lib/Target/X86/X86InstrFMA.td
@@ -244,12 +244,12 @@ multiclass fma3s<bits<8> opc132, bits<8> opc213, bits<8> opc231,
   // operand, not the second.
   let Predicates = [HasFMA] in {
     def : Pat<(IntF32 VR128:$src1, VR128:$src2, VR128:$src3),
-              (COPY_TO_REGCLASS(!cast<Instruction>(NAME#"213SSr_Int")
-               $src1, $src2, $src3), VR128)>;
+              (!cast<Instruction>(NAME#"213SSr_Int")
+               VR128:$src1, VR128:$src2, VR128:$src3)>;
 
     def : Pat<(IntF64 VR128:$src1, VR128:$src2, VR128:$src3),
-              (COPY_TO_REGCLASS(!cast<Instruction>(NAME#"213SDr_Int")
-               $src1, $src2, $src3), VR128)>;
+              (!cast<Instruction>(NAME#"213SDr_Int")
+               VR128:$src1, VR128:$src2, VR128:$src3)>;
   }
 }