]> granicus.if.org Git - libvpx/commitdiff
Fix uninitialized read in postprocessing
authorYunqing Wang <yunqingwang@google.com>
Mon, 24 Mar 2014 21:54:25 +0000 (14:54 -0700)
committerYunqing Wang <yunqingwang@google.com>
Mon, 24 Mar 2014 21:54:25 +0000 (14:54 -0700)
This patch fixed WebRTC Issue 3020: "Uninit error at
vp8_mbpost_proc_down_xmm". The first 8 values in d were not initialized,
but was accessed. This patch fixed c code as well as mmx and sse2 code.

Change-Id: Iaa5b41a4ed3bea971b15fb826ce34b7ab4e36fb1

vp8/common/postproc.c
vp8/common/x86/postproc_mmx.asm
vp8/common/x86/postproc_sse2.asm

index e3bee32c1912b90ecaaa2341873f8693b0ed4088..7d0fbf60905ed74502d3045dfeccbe442eaa6c86 100644 (file)
@@ -303,8 +303,8 @@ void vp8_mbpost_proc_down_c(unsigned char *dst, int pitch, int rows, int cols, i
             {
                 d[r&15] = (rv2[r&127] + sum + s[0]) >> 4;
             }
-
-            s[-8*pitch] = d[(r-8)&15];
+            if (r >= 8)
+              s[-8*pitch] = d[(r-8)&15];
             s += pitch;
         }
     }
index 5cf110b532648e9091a7785bade3b397914e642a..8be3431f9b04882f6161450e58c6ea528bbe52ce 100644 (file)
@@ -204,13 +204,16 @@ sym(vp8_mbpost_proc_down_mmx):
             and         rcx,        15
             movd        DWORD PTR   [rsp+rcx*4], mm1 ;d[rcx*4]
 
+            cmp         edx,        8
+            jl          .skip_assignment
+
             mov         rcx,        rdx
             sub         rcx,        8
-
             and         rcx,        15
             movd        mm1,        DWORD PTR [rsp+rcx*4] ;d[rcx*4]
-
             movd        [rsi],      mm1
+
+.skip_assignment
             lea         rsi,        [rsi+rax]
 
             lea         rdi,        [rdi+rax]
index 00f84a31b21d9a8f03178222a3365b1aca955956..f53daa7e50830e95463758f864d510aa55dcbf52 100644 (file)
@@ -425,13 +425,16 @@ sym(vp8_mbpost_proc_down_xmm):
             and         rcx,        15
             movq        QWORD PTR   [rsp + rcx*8], xmm1 ;d[rcx*8]
 
+            cmp         edx,        8
+            jl          .skip_assignment
+
             mov         rcx,        rdx
             sub         rcx,        8
-
             and         rcx,        15
             movq        mm0,        [rsp + rcx*8] ;d[rcx*8]
-
             movq        [rsi],      mm0
+
+.skip_assignment
             lea         rsi,        [rsi+rax]
 
             lea         rdi,        [rdi+rax]