r225551 vector byte shuffle optimization caused an assertion as fully zeroable vectors can be produced under certain circumstances. This fix drops the assert and returns a zero vector where the assert would have failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225718
91177308-0d34-0410-b5e6-
96231b3b80d8
V2InUse |= (ZeroMask != V2Idx);
}
}
- assert((V1InUse || V2InUse) && "Shuffling to a zeroable vector");
if (V1InUse)
V1 = DAG.getNode(X86ISD::PSHUFB, DL, MVT::v16i8, V1,
return V1; // Single inputs are easy.
if (V2InUse)
return V2; // Single inputs are easy.
+ // Shuffling to a zeroable vector.
+ return getZeroVector(MVT::v16i8, Subtarget, DAG, DL);
}
// There are special ways we can lower some single-element blends.