]> granicus.if.org Git - llvm/commitdiff
[AMDGPU] Create a TargetInfo header. NFC
authorRichard Trieu <rtrieu@google.com>
Tue, 14 May 2019 21:54:37 +0000 (21:54 +0000)
committerRichard Trieu <rtrieu@google.com>
Tue, 14 May 2019 21:54:37 +0000 (21:54 +0000)
Move the declarations of getThe<Name>Target() functions into a new header in
TargetInfo and make users of these functions include this new header.
This fixes a layering problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360713 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/AMDGPU.h
lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.h [new file with mode: 0644]

index e975bd63197f2407cdd063929f8bf4b11bbdbe7a..adac93dc11d8b27baee6d4ddf333b07b516a15fb 100644 (file)
@@ -227,9 +227,6 @@ extern char &GCNRegBankReassignID;
 void initializeGCNNSAReassignPass(PassRegistry &);
 extern char &GCNNSAReassignID;
 
-Target &getTheAMDGPUTarget();
-Target &getTheGCNTarget();
-
 namespace AMDGPU {
 enum TargetIndex {
   TI_CONSTDATA_START,
index 9154139e4c50453898bc4b3658326ba6f5ee3881..0e8a517d1d644e223065f47bc32d0ba8315cb126 100644 (file)
@@ -30,6 +30,7 @@
 #include "SIInstrInfo.h"
 #include "SIMachineFunctionInfo.h"
 #include "SIRegisterInfo.h"
+#include "TargetInfo/AMDGPUTargetInfo.h"
 #include "Utils/AMDGPUBaseInfo.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
index ac996f197b6da8dac75fd90f4e29be9567888d30..41876eb71259da29718ea19027106c783b0295cf 100644 (file)
@@ -26,6 +26,7 @@
 #include "R600MachineScheduler.h"
 #include "SIMachineFunctionInfo.h"
 #include "SIMachineScheduler.h"
+#include "TargetInfo/AMDGPUTargetInfo.h"
 #include "llvm/CodeGen/GlobalISel/IRTranslator.h"
 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
 #include "llvm/CodeGen/GlobalISel/Legalizer.h"
index e1241139fbfca98374c0d16437eadf74f3371686..8687759c971b9d11a5cceaf6eff64fd05d782541 100644 (file)
@@ -12,6 +12,7 @@
 #include "MCTargetDesc/AMDGPUTargetStreamer.h"
 #include "SIDefines.h"
 #include "SIInstrInfo.h"
+#include "TargetInfo/AMDGPUTargetInfo.h"
 #include "Utils/AMDGPUAsmUtils.h"
 #include "Utils/AMDGPUBaseInfo.h"
 #include "Utils/AMDKernelCodeTUtils.h"
index f9f6358e0f8280923922b23a9c8b93940709548e..ea01416cd1512f89a3bbcf9186552897337ba530 100644 (file)
@@ -21,7 +21,7 @@
 #include "AMDGPURegisterInfo.h"
 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
 #include "SIDefines.h"
-#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
+#include "TargetInfo/AMDGPUTargetInfo.h"
 #include "Utils/AMDGPUBaseInfo.h"
 #include "llvm-c/Disassembler.h"
 #include "llvm/ADT/APInt.h"
index ac00bf71b8922a87c554b49ea6bdc6ac39830fbd..88df64d18cc5ed415cbb2b3c88325ac74f2dc9ca 100644 (file)
@@ -17,6 +17,7 @@
 #include "AMDGPUMCAsmInfo.h"
 #include "AMDGPUTargetStreamer.h"
 #include "SIDefines.h"
+#include "TargetInfo/AMDGPUTargetInfo.h"
 #include "llvm/MC/MCAsmBackend.h"
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCContext.h"
index aa8f4fdacb5ab9c0192fa830b0c144f5985dc27e..9754d31fee60093e7c9232faa4673d237b5a02e8 100644 (file)
@@ -33,9 +33,6 @@ class Target;
 class Triple;
 class raw_pwrite_stream;
 
-Target &getTheAMDGPUTarget();
-Target &getTheGCNTarget();
-
 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
                                        const MCRegisterInfo &MRI,
                                        MCContext &Ctx);
index 3d412830681871cb0dfdac450bce29408bbd82d8..30cf12337c6e32598e3ae90bad29a9099d53263d 100644 (file)
@@ -10,7 +10,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "AMDGPUTargetMachine.h"
+#include "TargetInfo/AMDGPUTargetInfo.h"
 #include "llvm/Support/TargetRegistry.h"
 
 using namespace llvm;
diff --git a/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.h b/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.h
new file mode 100644 (file)
index 0000000..1e6dbd9
--- /dev/null
@@ -0,0 +1,29 @@
+//===-- TargetInfo/AMDGPUTargetInfo.h - TargetInfo for AMDGPU ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+/// \file
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_AMDGPU_TARGETINFO_AMDGPUTARGETINFO_H
+#define LLVM_LIB_TARGET_AMDGPU_TARGETINFO_AMDGPUTARGETINFO_H
+
+namespace llvm {
+
+class Target;
+
+/// The target which supports all AMD GPUs.  This will eventually
+///         be deprecated and there will be a R600 target and a GCN target.
+Target &getTheAMDGPUTarget();
+
+/// The target for GCN GPUs
+Target &getTheGCNTarget();
+
+}
+
+#endif // LLVM_LIB_TARGET_AMDGPU_TARGETINFO_AMDGPUTARGETINFO_H