[ARM GlobalISel] Fix selecting G_BRCOND

When lowering a G_BRCOND, we generate a TSTri of the condition against
1, which sets the flags, and then a Bcc which branches based on the
value of the flags.

Unfortunately, we were using the wrong condition code to check whether
we need to branch (EQ instead of NE), which caused all our branches to
do the opposite of what they were intended to do. This patch fixes the
issue by using the correct condition code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319313 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstructionSelector.cpp b/lib/Target/ARM/ARMInstructionSelector.cpp
index 4d286ed619ffb9b23d21dead8f8520289770872f..6bbeae2e115140150b940a5ec0777fe578b90ed9 100644 (file)
--- a/lib/Target/ARM/ARMInstructionSelector.cpp
+++ b/lib/Target/ARM/ARMInstructionSelector.cpp
@@ -855,7 +855,7 @@ bool ARMInstructionSelector::select(MachineInstr &I,
     // Branch conditionally.
     auto Branch = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(ARM::Bcc))
                       .add(I.getOperand(1))
-                      .add(predOps(ARMCC::EQ, ARM::CPSR));
+                      .add(predOps(ARMCC::NE, ARM::CPSR));
     if (!constrainSelectedInstRegOperands(*Branch, TII, TRI, RBI))
       return false;
     I.eraseFromParent();

diff --git a/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir b/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
index a54430878bed17335fff3b9e8ec1df4710cfd9a7..64773e7ebb12e1edbce2ac4e89eebd396a9b97fa 100644 (file)
--- a/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
+++ b/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
@@ -1171,7 +1171,7 @@ body:             |
 
     G_BRCOND %1(s1), %bb.1
     ; CHECK: TSTri [[COND]], 1, 14, _, implicit-def %cpsr
-    ; CHECK: Bcc %bb.1, 0, %cpsr
+    ; CHECK: Bcc %bb.1, 1, %cpsr
     G_BR %bb.2
     ; CHECK: B %bb.2
 

diff --git a/test/CodeGen/ARM/GlobalISel/arm-isel.ll b/test/CodeGen/ARM/GlobalISel/arm-isel.ll
index 50c4e7232518fa7c9e5c6486ea4adec453aef7e4..579101e2d2af26420b936c009bae5e2690e9b151 100644 (file)
--- a/test/CodeGen/ARM/GlobalISel/arm-isel.ll
+++ b/test/CodeGen/ARM/GlobalISel/arm-isel.ll
@@ -442,7 +442,7 @@ define arm_aapcscc void @test_brcond(i32 %n) {
 ; CHECK: cmp r0
 ; CHECK-NEXT: movgt [[RCMP:r[0-9]+]], #1
 ; CHECK: tst [[RCMP]], #1
-; CHECK-NEXT: bne [[FALSE:.L[[:alnum:]_]+]]
+; CHECK-NEXT: beq [[FALSE:.L[[:alnum:]_]+]]
 ; CHECK: bl brcond1
 ; CHECK: [[FALSE]]:
 ; CHECK: bl brcond2